[llvm] [RISCV] Avoid vl toggles when lowering vector_splice/experimental_vp_splice (PR #146746)

[Craig Topper via llvm-commits]

topperc wrote:

> > > This is operating under the assumption that a vl toggle is more expensive than performing the vslidedown at a higher vl on the average microarchitecture.
> > 
> > 
> > On X280, the VL toggle is better. The scalar unit is running ahead of the vector unit. The VL has been computed before the vector unit needs it. The VL is used to reduce the number of uops in the vector unit.
> 
> In RISCVInsertVSETVLI we increase vl for vslides with an immediate of 1:
> 
> https://github.com/llvm/llvm-project/blob/e9be5286e14e2c290232e6dd6e04c7f5e9410885/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp#L428

That code has an LMUL=1 restriction so that helps. Though x280's ALU width is VLEN/2.

> 
> So for non EVL loops today we actually already omit the toggle. (I'm not sure why the EVL path doesn't trigger this)
> 
> Should we add a tuning feature to gate this?

I think so.

https://github.com/llvm/llvm-project/pull/146746