[llvm] [RISCV] Check whether plain type is supported for permutation intrinsics instead of its float type (PR #146657)

[Craig Topper via llvm-commits]

topperc wrote:

> Doesn't the change enable `zvfhmin` instructions even if `zvfhmin` is not enabled?

No because the type is blocked by type legalizer. It's not possible for a f16 vector type to get to the isel stage without Zvfhmin. The predicates in tablegen don't really do anything.

https://github.com/llvm/llvm-project/pull/146657