[llvm] [AMDGPU] Ensure non-reserved CSR spilled regs are live-in (PR #146427)

[Matt Arsenault via llvm-commits]

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+; Just ensure that llc -O1 does not error out
+; RUN: llc -O1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs %s -o - &>/dev/null
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arsenm wrote:

For case like this where you merely need to trigger spilling, it's easier to write an artificial testcase with inline asm to ensure no physical registers are available at some point 

https://github.com/llvm/llvm-project/pull/146427