[llvm] [AMDGPU] Create hi-half of 64-bit ashr with mov of -1 (PR #146569)

[Shilei Tian via llvm-commits]

================
@@ -4218,9 +4218,15 @@ SDValue AMDGPUTargetLowering::performSraCombine(SDNode *N,
     SDValue SplitLHS = DAG.getNode(ISD::BITCAST, LHSSL, ConcatType, LHS);
     Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, LHSSL, TargetType, SplitLHS, One);
   }
-  Hi = DAG.getFreeze(Hi);
 
-  SDValue HiShift = DAG.getNode(ISD::SRA, SL, TargetType, Hi, ShiftFullAmt);
+  KnownBits KnownLHS = DAG.computeKnownBits(LHS);
+  SDValue HiShift;
+  if (KnownLHS.isNegative())
+    HiShift = DAG.getAllOnesConstant(SL, TargetType);
+  else {
----------------
shiltian wrote:

```suggestion
  if (KnownLHS.isNegative()) {
    HiShift = DAG.getAllOnesConstant(SL, TargetType);
  }
  else {
```

The reason we need `{}` here is to make it align with the `else` part.

https://github.com/llvm/llvm-project/pull/146569