[llvm] [AMDGPU] Create hi-half of 64-bit ashr with mov of -1 (PR #146569)

[via llvm-commits]

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@@ -0,0 +1,102 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck %s
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LU-JOHN wrote:

This was derived from ashr64_reduce.ll.  There's no particular reason why pal was chosen.

https://github.com/llvm/llvm-project/pull/146569