[llvm] [AArch64][Codegen]Transform saturating smull to sqdmulh (PR #143671)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 1 09:23:14 PDT 2025
================
@@ -20918,6 +20928,79 @@ static SDValue performBuildVectorCombine(SDNode *N,
return SDValue();
}
+// A special combine for the sqdmulh family of instructions.
+// smin( sra ( mul( sext v0, sext v1 ) ), SHIFT_AMOUNT ),
+// SATURATING_VAL ) can be reduced to sext(sqdmulh(...))
+static SDValue trySQDMULHCombine(SDNode *N, SelectionDAG &DAG) {
+
+ if (N->getOpcode() != ISD::TRUNCATE)
----------------
davemgreen wrote:
Yep start from the SMIN, in something like performSMINCombine. (It doesn't exist yet, and performDAGCombine can call trySQDMULHCombine directly for SMIN).
The idea is not to match `trunc(smin(asr(mul(..))))` and generate `sqdmulh(..)`, but instead to match `smin(asr(mul(..))))` and generate `sext(sqdmulh(..))`, which should always be equivalent but more generic. We might temporarily have `trunc(sext(sqdmulh(..)))`, but the trunc+sext will optimize away.
https://github.com/llvm/llvm-project/pull/143671
More information about the llvm-commits
mailing list