[llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)

[Janek van Oirschot via llvm-commits]

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@@ -210,14 +210,26 @@ bb:
 }
 
 ; GCN-LABEL: {{^}}test_mfma_f64_16x16x4f64_splat_imm_int_64_in_high_bits:
-; GCN: v_accvgpr_write_b32 a[[A_LOW_BITS_0:[0-9]+]], 0{{$}}
-; GCN: v_accvgpr_write_b32 a[[A_HIGH_BITS_0:[0-9]+]], 64
-; GCN: v_accvgpr_mov_b32 a{{[0-9]+}}, a[[A_LOW_BITS_0]]
-; GCN: v_accvgpr_mov_b32 a{{[0-9]+}}, a[[A_HIGH_BITS_0]]
-; GCN: v_accvgpr_mov_b32 a{{[0-9]+}}, a[[A_LOW_BITS_0]]
-; GCN: v_accvgpr_mov_b32 a{{[0-9]+}}, a[[A_HIGH_BITS_0]]
-; GCN: v_accvgpr_mov_b32 a{{[0-9]+}}, a[[A_LOW_BITS_0]]
-; GCN: v_accvgpr_mov_b32 a[[LAST_CONST_REG:[0-9]+]], a[[A_HIGH_BITS_0]]
+; GFX90A: v_accvgpr_write_b32 a[[A_LOW_BITS_0:[0-9]+]], 0{{$}}
+; GFX90A: v_accvgpr_write_b32 a[[A_HIGH_BITS_0:[0-9]+]], 64
+; GFX90A: v_accvgpr_mov_b32 a{{[0-9]+}}, a[[A_LOW_BITS_0]]
+; GFX90A: v_accvgpr_mov_b32 a{{[0-9]+}}, a[[A_HIGH_BITS_0]]
+; GFX90A: v_accvgpr_mov_b32 a{{[0-9]+}}, a[[A_LOW_BITS_0]]
+; GFX90A: v_accvgpr_mov_b32 a{{[0-9]+}}, a[[A_HIGH_BITS_0]]
+; GFX90A: v_accvgpr_mov_b32 a{{[0-9]+}}, a[[A_LOW_BITS_0]]
+; GFX90A: v_accvgpr_mov_b32 a[[LAST_CONST_REG:[0-9]+]], a[[A_HIGH_BITS_0]]
+
+; GFX942: s_mov_b32 s[[S_LOW_BITS_0:[0-9]+]], 0{{$}}
+; GFX942: s_mov_b32 s[[S_HIGH_BITS_64:[0-9]+]], 64
+; GFX942: v_mov_b64_e32 v[[[V_LOW_BITS_0:[0-9]+]]:[[V_HIGH_BITS_64:[0-9]+]]], s[[[S_LOW_BITS_0]]:[[S_HIGH_BITS_64]]]
+; GFX942: v_accvgpr_write_b32 a[[A_LOW_BITS_0:[0-9]+]], v[[V_LOW_BITS_0]]
+; GFX942: v_accvgpr_write_b32 a[[A_HIGH_BITS_0:[0-9]+]], v[[V_HIGH_BITS_64]]
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JanekvO wrote:

Regression that came from rebase; haven't looked into it yet but seems a missing case in imm folding

https://github.com/llvm/llvm-project/pull/145052