[llvm] [LV][EVL] Generate negative strided load/store for reversed load/store (PR #123608)

[Mel Chen via llvm-commits]

Mel-Chen wrote:

@preames https://github.com/llvm/llvm-project/pull/146525
We've taken the first step toward permutation elimination in VPlan, and plan to continue pushing it forward.

On a related note, https://github.com/llvm/llvm-project/pull/128718 is part of our work on strided loads for stride -1. We understand that transforming reverse loads into strided loads directly in the vectorizer might cause missed optimization opportunities in instCombine. However, support for constant strided loads depends on the design introduced in the stride -1 patch, such as VPWidenStridedLoadRecipe.

Would it be possible to settle on the implementation approach for strided accesses now, so that we can continue progressing on constant strided load support? That is, we could approve the patch now but delay landing it until after permutation elimination in VPlan is in place.

cc: @alexey-bataev 

https://github.com/llvm/llvm-project/pull/123608