[llvm] 72f87d2 - [DAG] canCreateUndefOrPoison - remove isGuaranteedNotToBeUndefOrPoison check for insert/extract vector element indices (#146514)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 1 06:01:58 PDT 2025
Author: Simon Pilgrim
Date: 2025-07-01T14:01:54+01:00
New Revision: 72f87d2d69b2a735f6a68e7ee53fa9a7597b6b3a
URL: https://github.com/llvm/llvm-project/commit/72f87d2d69b2a735f6a68e7ee53fa9a7597b6b3a
DIFF: https://github.com/llvm/llvm-project/commit/72f87d2d69b2a735f6a68e7ee53fa9a7597b6b3a.diff
LOG: [DAG] canCreateUndefOrPoison - remove isGuaranteedNotToBeUndefOrPoison check for insert/extract vector element indices (#146514)
No longer necessary now that #146490 has landed
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 4e4e70138965f..6df21b624137f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5640,12 +5640,8 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
// Ensure that the element index is in bounds.
EVT VecVT = Op.getOperand(0).getValueType();
SDValue Idx = Op.getOperand(Opcode == ISD::INSERT_VECTOR_ELT ? 2 : 1);
- if (isGuaranteedNotToBeUndefOrPoison(Idx, DemandedElts, PoisonOnly,
- Depth + 1)) {
- KnownBits KnownIdx = computeKnownBits(Idx, Depth + 1);
- return KnownIdx.getMaxValue().uge(VecVT.getVectorMinNumElements());
- }
- return true;
+ KnownBits KnownIdx = computeKnownBits(Idx, Depth + 1);
+ return KnownIdx.getMaxValue().uge(VecVT.getVectorMinNumElements());
}
case ISD::VECTOR_SHUFFLE: {
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