[llvm] [X86] detectZextAbsDiff - use m_SpecificVectorElementVT matcher. NFC. (PR #146498)
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Tue Jul 1 02:46:34 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Simon Pilgrim (RKSimon)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/146498.diff
1 Files Affected:
- (modified) llvm/lib/Target/X86/X86ISelLowering.cpp (+5-6)
``````````diff
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 01f309ddd721c..232d055223f64 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -45998,12 +45998,11 @@ static bool detectZextAbsDiff(SDValue Abs, SDValue &Op0, SDValue &Op1) {
using namespace SDPatternMatch;
// Check if the operands of the sub are zero-extended from vectors of i8.
- EVT SrcVT0, SrcVT1;
- return sd_match(Abs,
- m_Abs(m_Sub(m_AllOf(m_Value(Op0), m_ZExt(m_VT(SrcVT0))),
- m_AllOf(m_Value(Op1), m_ZExt(m_VT(SrcVT1)))))) &&
- SrcVT0.getVectorElementType() == MVT::i8 &&
- SrcVT1.getVectorElementType() == MVT::i8;
+ return sd_match(
+ Abs,
+ m_Abs(m_Sub(
+ m_AllOf(m_Value(Op0), m_ZExt(m_SpecificVectorElementVT(MVT::i8))),
+ m_AllOf(m_Value(Op1), m_ZExt(m_SpecificVectorElementVT(MVT::i8))))));
}
static SDValue createVPDPBUSD(SelectionDAG &DAG, SDValue LHS, SDValue RHS,
``````````
</details>
https://github.com/llvm/llvm-project/pull/146498
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