[llvm] [X86] Add diagnostic for fp128 inline assemble for 32-bit (PR #146458)
Phoebe Wang via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 30 20:09:15 PDT 2025
https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/146458
Suggested by Craig from #146259
>From 364d9661c32a0a0e363ebe0c444b0582ff2fa7d3 Mon Sep 17 00:00:00 2001
From: "Wang, Phoebe" <phoebe.wang at intel.com>
Date: Tue, 1 Jul 2025 10:37:39 +0800
Subject: [PATCH] [X86] Add diagnostic for fp128 inline assemble for 32-bit
Suggested by Craig from #146259
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 3 +++
llvm/test/CodeGen/X86/pr43157.ll | 3 ++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 36920de8cb7c5..01f309ddd721c 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -61737,6 +61737,9 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
return std::make_pair(0U, &X86::VR128XRegClass);
return std::make_pair(0U, &X86::VR128RegClass);
case MVT::f128:
+ if (!Subtarget.is64Bit())
+ break;
+ [[fallthrough]];
case MVT::v16i8:
case MVT::v8i16:
case MVT::v4i32:
diff --git a/llvm/test/CodeGen/X86/pr43157.ll b/llvm/test/CodeGen/X86/pr43157.ll
index 2b333782f43a0..308a8b91d859e 100644
--- a/llvm/test/CodeGen/X86/pr43157.ll
+++ b/llvm/test/CodeGen/X86/pr43157.ll
@@ -1,6 +1,7 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: not llc < %s -mtriple=i686-pc-linux -o - -mattr=+sse2 2>&1 | FileCheck %s --check-prefix=ERR
; RUN: llc < %s -mtriple=x86_64-pc-linux -o - -mattr=+mmx | FileCheck %s
+; ERR: error: couldn't allocate input reg for constraint 'x'
define void @foo(fp128 %x) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %entry
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