[llvm] [AArch64] Override canCombineStoreAndExtract (PR #145825)
Benjamin Maxwell via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 30 13:09:08 PDT 2025
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@@ -0,0 +1,434 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -codegenprepare -mtriple=arm64-apple-ios %s -o - -mattr=+neon -S | FileCheck --check-prefix=IR-BOTH --check-prefix=IR-NORMAL %s
+; RUN: opt -codegenprepare -mtriple=arm64-apple-ios %s -o - -mattr=+neon -S -stress-cgp-store-extract | FileCheck --check-prefix=IR-BOTH --check-prefix=IR-STRESS %s
+; RUN: llc -mtriple=arm64-apple-ios %s -o - -mattr=+neon | FileCheck --check-prefix=ASM %s
+
+;
+; Make sure we got rid of any expensive vmov.32 instructions.
+define void @simpleOneInstructionPromotion(<2 x i32>* %addr1, i32* %dest) {
+; ASM-LABEL: simpleOneInstructionPromotion:
+; ASM: ; %bb.0:
+; ASM-NEXT: ldr d0, [x0]
+; ASM-NEXT: orr.2s v0, #1
+; ASM-NEXT: st1.s { v0 }[1], [x1]
+; ASM-NEXT: ret
+ %in1 = load <2 x i32>, <2 x i32>* %addr1, align 8
+ %extract = extractelement <2 x i32> %in1, i32 1
+ %out = or i32 %extract, 1
+ store i32 %out, i32* %dest, align 4
+ ret void
+}
+
+;
----------------
MacDue wrote:
It seems like quite a few of these test cases don't change.
https://github.com/llvm/llvm-project/pull/145825
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