[llvm] 529508c - [DAG] canCreateUndefOrPoison - add handling for CTTZ/CTLZ nodes (#146361)

via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 30 09:48:08 PDT 2025


Author: Simon Pilgrim
Date: 2025-06-30T17:48:05+01:00
New Revision: 529508c187e948f5bb73af9ee8207f706899bdb4

URL: https://github.com/llvm/llvm-project/commit/529508c187e948f5bb73af9ee8207f706899bdb4
DIFF: https://github.com/llvm/llvm-project/commit/529508c187e948f5bb73af9ee8207f706899bdb4.diff

LOG: [DAG] canCreateUndefOrPoison - add handling for CTTZ/CTLZ nodes (#146361)

ISD::CTTZ/CTLZ nodes handle all input values and do not create undef/poison.

The *_ZERO_UNDEF variants will be handled in a future patch.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/test/CodeGen/X86/freeze-unary.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 93cfe6f02bc84..ad941a1964683 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5543,6 +5543,8 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
   case ISD::FSHL:
   case ISD::FSHR:
   case ISD::BSWAP:
+  case ISD::CTTZ:
+  case ISD::CTLZ:
   case ISD::CTPOP:
   case ISD::BITREVERSE:
   case ISD::PARITY:

diff  --git a/llvm/test/CodeGen/X86/freeze-unary.ll b/llvm/test/CodeGen/X86/freeze-unary.ll
index 2e707a4fee82f..3d1f676115069 100644
--- a/llvm/test/CodeGen/X86/freeze-unary.ll
+++ b/llvm/test/CodeGen/X86/freeze-unary.ll
@@ -129,24 +129,17 @@ declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>)
 define i32 @freeze_ctlz(i32 %a0) nounwind {
 ; X86-LABEL: freeze_ctlz:
 ; X86:       # %bb.0:
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    bsrl %eax, %ecx
-; X86-NEXT:    movl $63, %edx
-; X86-NEXT:    cmovnel %ecx, %edx
-; X86-NEXT:    xorl $31, %edx
-; X86-NEXT:    testl %eax, %eax
-; X86-NEXT:    movl $32, %eax
-; X86-NEXT:    cmovnel %edx, %eax
+; X86-NEXT:    bsrl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl $63, %eax
+; X86-NEXT:    cmovnel %ecx, %eax
+; X86-NEXT:    xorl $31, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: freeze_ctlz:
 ; X64:       # %bb.0:
-; X64-NEXT:    movl $63, %ecx
-; X64-NEXT:    bsrl %edi, %ecx
-; X64-NEXT:    xorl $31, %ecx
-; X64-NEXT:    testl %edi, %edi
-; X64-NEXT:    movl $32, %eax
-; X64-NEXT:    cmovnel %ecx, %eax
+; X64-NEXT:    movl $63, %eax
+; X64-NEXT:    bsrl %edi, %eax
+; X64-NEXT:    xorl $31, %eax
 ; X64-NEXT:    retq
   %x = call i32 @llvm.ctlz.i32(i32 %a0, i1 0)
   %f = freeze i32 %x
@@ -215,19 +208,15 @@ define i32 @freeze_ctlz_undef_nonzero(i32 %a0) nounwind {
 define i32 @freeze_cttz(i32 %a0) nounwind {
 ; X86-LABEL: freeze_cttz:
 ; X86:       # %bb.0:
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    bsfl %eax, %eax
-; X86-NEXT:    movl $32, %ecx
-; X86-NEXT:    cmovel %ecx, %eax
-; X86-NEXT:    cmovel %ecx, %eax
+; X86-NEXT:    bsfl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:    movl $32, %eax
+; X86-NEXT:    cmovnel %ecx, %eax
 ; X86-NEXT:    retl
 ;
 ; X64-LABEL: freeze_cttz:
 ; X64:       # %bb.0:
-; X64-NEXT:    movl $32, %ecx
 ; X64-NEXT:    movl $32, %eax
-; X64-NEXT:    bsfl %edi, %eax
-; X64-NEXT:    cmovel %ecx, %eax
+; X64-NEXT:    rep bsfl %edi, %eax
 ; X64-NEXT:    retq
   %x = call i32 @llvm.cttz.i32(i32 %a0, i1 0)
   %f = freeze i32 %x


        


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