[llvm] c00c5a3 - [X86] Add test coverage to show failure to push freeze through CTLZ/CTTZ nodes (+ZERO_UNDEF variants)

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2025-06-30T15:48:40+01:00
New Revision: c00c5a389899cc55b28e202f713c8bc94738f318

URL: https://github.com/llvm/llvm-project/commit/c00c5a389899cc55b28e202f713c8bc94738f318
DIFF: https://github.com/llvm/llvm-project/commit/c00c5a389899cc55b28e202f713c8bc94738f318.diff

LOG: [X86] Add test coverage to show failure to push freeze through CTLZ/CTTZ nodes (+ZERO_UNDEF variants)

Helps with nvtpx regression #145939

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/freeze-unary.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/freeze-unary.ll b/llvm/test/CodeGen/X86/freeze-unary.ll
index f2c02de74c07c..2e707a4fee82f 100644
--- a/llvm/test/CodeGen/X86/freeze-unary.ll
+++ b/llvm/test/CodeGen/X86/freeze-unary.ll
@@ -126,6 +126,165 @@ define <4 x i32> @freeze_bitreverse_vec(<4 x i32> %a0) nounwind {
 }
 declare <4 x i32> @llvm.bitreverse.v4i32(<4 x i32>)
 
+define i32 @freeze_ctlz(i32 %a0) nounwind {
+; X86-LABEL: freeze_ctlz:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    bsrl %eax, %ecx
+; X86-NEXT:    movl $63, %edx
+; X86-NEXT:    cmovnel %ecx, %edx
+; X86-NEXT:    xorl $31, %edx
+; X86-NEXT:    testl %eax, %eax
+; X86-NEXT:    movl $32, %eax
+; X86-NEXT:    cmovnel %edx, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: freeze_ctlz:
+; X64:       # %bb.0:
+; X64-NEXT:    movl $63, %ecx
+; X64-NEXT:    bsrl %edi, %ecx
+; X64-NEXT:    xorl $31, %ecx
+; X64-NEXT:    testl %edi, %edi
+; X64-NEXT:    movl $32, %eax
+; X64-NEXT:    cmovnel %ecx, %eax
+; X64-NEXT:    retq
+  %x = call i32 @llvm.ctlz.i32(i32 %a0, i1 0)
+  %f = freeze i32 %x
+  %c = icmp eq i32 %a0, 0
+  %r = select i1 %c, i32 32, i32 %f
+  ret i32 %r
+}
+
+define i32 @freeze_ctlz_undef(i32 %a0) nounwind {
+; X86-LABEL: freeze_ctlz_undef:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    bsrl %eax, %ecx
+; X86-NEXT:    xorl $31, %ecx
+; X86-NEXT:    testl %eax, %eax
+; X86-NEXT:    movl $32, %eax
+; X86-NEXT:    cmovnel %ecx, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: freeze_ctlz_undef:
+; X64:       # %bb.0:
+; X64-NEXT:    bsrl %edi, %ecx
+; X64-NEXT:    xorl $31, %ecx
+; X64-NEXT:    testl %edi, %edi
+; X64-NEXT:    movl $32, %eax
+; X64-NEXT:    cmovnel %ecx, %eax
+; X64-NEXT:    retq
+  %f0 = freeze i32 %a0
+  %x = call i32 @llvm.ctlz.i32(i32 %f0, i1 -1)
+  %f = freeze i32 %x
+  %c = icmp eq i32 %a0, 0
+  %r = select i1 %c, i32 32, i32 %f
+  ret i32 %r
+}
+
+define i32 @freeze_ctlz_undef_nonzero(i32 %a0) nounwind {
+; X86-LABEL: freeze_ctlz_undef_nonzero:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    orl $1, %eax
+; X86-NEXT:    bsrl %eax, %ecx
+; X86-NEXT:    xorl $31, %ecx
+; X86-NEXT:    testl %eax, %eax
+; X86-NEXT:    movl $32, %eax
+; X86-NEXT:    cmovnel %ecx, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: freeze_ctlz_undef_nonzero:
+; X64:       # %bb.0:
+; X64-NEXT:    orl $1, %edi
+; X64-NEXT:    bsrl %edi, %ecx
+; X64-NEXT:    xorl $31, %ecx
+; X64-NEXT:    testl %edi, %edi
+; X64-NEXT:    movl $32, %eax
+; X64-NEXT:    cmovnel %ecx, %eax
+; X64-NEXT:    retq
+  %f0 = freeze i32 %a0
+  %y = or i32 %f0, 1
+  %x = call i32 @llvm.ctlz.i32(i32 %y, i1 -1)
+  %f = freeze i32 %x
+  %c = icmp eq i32 %y, 0
+  %r = select i1 %c, i32 32, i32 %f
+  ret i32 %r
+}
+
+define i32 @freeze_cttz(i32 %a0) nounwind {
+; X86-LABEL: freeze_cttz:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    bsfl %eax, %eax
+; X86-NEXT:    movl $32, %ecx
+; X86-NEXT:    cmovel %ecx, %eax
+; X86-NEXT:    cmovel %ecx, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: freeze_cttz:
+; X64:       # %bb.0:
+; X64-NEXT:    movl $32, %ecx
+; X64-NEXT:    movl $32, %eax
+; X64-NEXT:    bsfl %edi, %eax
+; X64-NEXT:    cmovel %ecx, %eax
+; X64-NEXT:    retq
+  %x = call i32 @llvm.cttz.i32(i32 %a0, i1 0)
+  %f = freeze i32 %x
+  %c = icmp eq i32 %a0, 0
+  %r = select i1 %c, i32 32, i32 %f
+  ret i32 %r
+}
+
+define i32 @freeze_cttz_undef(i32 %a0) nounwind {
+; X86-LABEL: freeze_cttz_undef:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    bsfl %eax, %ecx
+; X86-NEXT:    movl $32, %eax
+; X86-NEXT:    cmovnel %ecx, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: freeze_cttz_undef:
+; X64:       # %bb.0:
+; X64-NEXT:    bsfl %edi, %ecx
+; X64-NEXT:    movl $32, %eax
+; X64-NEXT:    cmovnel %ecx, %eax
+; X64-NEXT:    retq
+  %f0 = freeze i32 %a0
+  %x = call i32 @llvm.cttz.i32(i32 %f0, i1 -1)
+  %f = freeze i32 %x
+  %c = icmp eq i32 %a0, 0
+  %r = select i1 %c, i32 32, i32 %f
+  ret i32 %r
+}
+
+define i32 @freeze_cttz_undef_nonzero(i32 %a0) nounwind {
+; X86-LABEL: freeze_cttz_undef_nonzero:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    orl $1, %eax
+; X86-NEXT:    bsfl %eax, %ecx
+; X86-NEXT:    movl $32, %eax
+; X86-NEXT:    cmovnel %ecx, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: freeze_cttz_undef_nonzero:
+; X64:       # %bb.0:
+; X64-NEXT:    orl $1, %edi
+; X64-NEXT:    bsfl %edi, %ecx
+; X64-NEXT:    movl $32, %eax
+; X64-NEXT:    cmovnel %ecx, %eax
+; X64-NEXT:    retq
+  %f0 = freeze i32 %a0
+  %y = or i32 %f0, 1
+  %x = call i32 @llvm.cttz.i32(i32 %y, i1 -1)
+  %f = freeze i32 %x
+  %c = icmp eq i32 %y, 0
+  %r = select i1 %c, i32 32, i32 %f
+  ret i32 %r
+}
+
 ; split parity pattern
 define i8 @freeze_ctpop(i8 %a0) nounwind {
 ; X86-LABEL: freeze_ctpop: