[llvm] f226852 - [X86] Add test coverage to show failure to push freeze through ssubo/usubo nodes (+carry variants)

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2025-06-30T10:35:15+01:00
New Revision: f226852265e6eca9c0f0633cc25dc5e1f30b2c55

URL: https://github.com/llvm/llvm-project/commit/f226852265e6eca9c0f0633cc25dc5e1f30b2c55
DIFF: https://github.com/llvm/llvm-project/commit/f226852265e6eca9c0f0633cc25dc5e1f30b2c55.diff

LOG: [X86] Add test coverage to show failure to push freeze through ssubo/usubo nodes (+carry variants)

Test coverage to pull out the overflow handling from #145939

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/freeze-binary.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/freeze-binary.ll b/llvm/test/CodeGen/X86/freeze-binary.ll
index 35512883f9bfe..4b25fd8a536b2 100644
--- a/llvm/test/CodeGen/X86/freeze-binary.ll
+++ b/llvm/test/CodeGen/X86/freeze-binary.ll
@@ -862,6 +862,76 @@ define i32 @freeze_uaddo(i32 %a0, i32 %a1, i8 %a2, i8 %a3) nounwind {
   ret i32 %r
 }
 
+define i32 @freeze_ssubo(i32 %a0, i32 %a1, i8 %a2, i8 %a3) nounwind {
+; X86-LABEL: freeze_ssubo:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    xorl %ecx, %ecx
+; X86-NEXT:    addb {{[0-9]+}}(%esp), %dl
+; X86-NEXT:    setb %cl
+; X86-NEXT:    andl $1, %ecx
+; X86-NEXT:    subl %ecx, %eax
+; X86-NEXT:    subl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: freeze_ssubo:
+; X64:       # %bb.0:
+; X64-NEXT:    movl %edi, %eax
+; X64-NEXT:    xorl %edi, %edi
+; X64-NEXT:    addb %cl, %dl
+; X64-NEXT:    setb %dil
+; X64-NEXT:    andl $1, %edi
+; X64-NEXT:    subl %edi, %eax
+; X64-NEXT:    subl %esi, %eax
+; X64-NEXT:    retq
+  %b = call {i8, i1} @llvm.uadd.with.overflow.i8(i8 %a2, i8 %a3)
+  %b.o = extractvalue {i8, i1} %b, 1
+  %x = zext i1 %b.o to i32
+
+  %f0 = freeze i32 %a0
+  %o = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %f0, i32 %x)
+  %f = freeze {i32, i1} %o
+  %v = extractvalue {i32, i1} %f, 0
+  %r = sub i32 %v, %a1
+  ret i32 %r
+}
+
+define i32 @freeze_usubo(i32 %a0, i32 %a1, i8 %a2, i8 %a3) nounwind {
+; X86-LABEL: freeze_usubo:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movzbl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    xorl %ecx, %ecx
+; X86-NEXT:    addb {{[0-9]+}}(%esp), %dl
+; X86-NEXT:    setb %cl
+; X86-NEXT:    andl $1, %ecx
+; X86-NEXT:    subl %ecx, %eax
+; X86-NEXT:    subl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: freeze_usubo:
+; X64:       # %bb.0:
+; X64-NEXT:    movl %edi, %eax
+; X64-NEXT:    xorl %edi, %edi
+; X64-NEXT:    addb %cl, %dl
+; X64-NEXT:    setb %dil
+; X64-NEXT:    andl $1, %edi
+; X64-NEXT:    subl %edi, %eax
+; X64-NEXT:    subl %esi, %eax
+; X64-NEXT:    retq
+  %b = call {i8, i1} @llvm.uadd.with.overflow.i8(i8 %a2, i8 %a3)
+  %b.o = extractvalue {i8, i1} %b, 1
+  %x = zext i1 %b.o to i32
+
+  %f0 = freeze i32 %a0
+  %o = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %f0, i32 %x)
+  %f = freeze {i32, i1} %o
+  %v = extractvalue {i32, i1} %f, 0
+  %r = sub i32 %v, %a1
+  ret i32 %r
+}
+
 define void @pr59676_frozen(ptr %dst, i32 %x.orig) {
 ; X86-LABEL: pr59676_frozen:
 ; X86:       # %bb.0: