[llvm] [X86] Avoid crashing in PIC mode on narrowing to i8 followed by extension to i32 (PR #145965)

[Matt Arsenault via llvm-commits]

================
@@ -631,7 +631,8 @@ void InstrEmitter::EmitSubregNode(SDNode *Node, VRBaseMapType &VRBaseMap,
 void
 InstrEmitter::EmitCopyToRegClassNode(SDNode *Node,
                                      VRBaseMapType &VRBaseMap) {
-  Register VReg = getVR(Node->getOperand(0), VRBaseMap);
+  RegisterSDNode *R = dyn_cast<RegisterSDNode>(Node->getOperand(0));
+  unsigned VReg = R ? R->getReg() : getVR(Node->getOperand(0), VRBaseMap);
----------------
arsenm wrote:

This seems like a weird case where X86 invented a hack for a presumably constant register that avoids the chain use. Is there a reason this can't just use CopyFromReg for these in the first place? Alternatively we could have a TargetConstantRegister node type 

https://github.com/llvm/llvm-project/pull/145965