[llvm] [Xtensa] Implement lowering SELECT_CC/BRCC for Xtensa FP Option. (PR #145544)

[Matt Arsenault via llvm-commits]

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@@ -1510,6 +1604,30 @@ MachineBasicBlock *XtensaTargetLowering::EmitInstrWithCustomInserter(
   const XtensaInstrInfo &TII = *Subtarget.getInstrInfo();
 
   switch (MI.getOpcode()) {
+  case Xtensa::BRCC_FP: {
+    MachineOperand &Cond = MI.getOperand(0);
+    MachineOperand &LHS = MI.getOperand(1);
+    MachineOperand &RHS = MI.getOperand(2);
+    MachineBasicBlock *TargetBB = MI.getOperand(3).getMBB();
+    unsigned BrKind = 0;
+    unsigned CmpKind = 0;
+    ISD::CondCode CondCode = (ISD::CondCode)Cond.getImm();
+    unsigned BReg = Xtensa::B0;
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arsenm wrote:

```suggestion
    MCRegister BReg = Xtensa::B0;
```

Or just directly use B0 in the 2 uses 

https://github.com/llvm/llvm-project/pull/145544