[llvm] [RISCV] Remove untested code from SelectAddrRegRegScale. (PR #146185)
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Fri Jun 27 18:41:10 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Craig Topper (topperc)
<details>
<summary>Changes</summary>
This code handled load/store address that are a SHL instruction. That seems very unlikely to occur unless you're accessing an array that starts at address 0. I'm not even sure if you can represent that in llvm IR.
---
Full diff: https://github.com/llvm/llvm-project/pull/146185.diff
1 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp (-4)
``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 4539efd591c8b..29eac6317080f 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -2824,10 +2824,6 @@ bool RISCVDAGToDAGISel::SelectAddrRegRegScale(SDValue Addr,
Base = Addr.getOperand(0);
return true;
}
- } else if (UnwrapShl(Addr, Index, Scale)) {
- EVT VT = Addr.getValueType();
- Base = CurDAG->getRegister(RISCV::X0, VT);
- return true;
}
return false;
``````````
</details>
https://github.com/llvm/llvm-project/pull/146185
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