[llvm] Port isNonZeroShift to SelectionDAG (PR #146125)
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Fri Jun 27 11:55:03 PDT 2025
https://github.com/AZero13 updated https://github.com/llvm/llvm-project/pull/146125
>From 5034594d127bf824fbe4107cc2030a516fe7e0f8 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Fri, 27 Jun 2025 13:58:29 -0400
Subject: [PATCH 1/2] Port isNonZeroShift to SelectionDAG
---
.../lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 59 ++++++++++++++++---
1 file changed, 52 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index fe9a6ea3e77e6..c4471ed42a0d4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5871,6 +5871,55 @@ bool SelectionDAG::isKnownNeverZeroFloat(SDValue Op) const {
Op, [](ConstantFPSDNode *C) { return !C->isZero(); });
}
+static bool isNonZeroShift(const SelectionDAG &DAG, const SDValue I,
+ const KnownBits &KnownVal, unsigned Depth) {
+ auto ShiftOp = [&](const APInt &Lhs, const APInt &Rhs) {
+ switch (I.getOpcode()) {
+ case Instruction::Shl:
+ return Lhs.shl(Rhs);
+ case Instruction::LShr:
+ return Lhs.lshr(Rhs);
+ case Instruction::AShr:
+ return Lhs.ashr(Rhs);
+ default:
+ llvm_unreachable("Unknown Shift Opcode");
+ }
+ };
+
+ auto InvShiftOp = [&](const APInt &Lhs, const APInt &Rhs) {
+ switch (I.getOpcode()) {
+ case ISD::SHL:
+ return Lhs.lshr(Rhs);
+ case ISD::SRA:
+ case ISD::SRL:
+ return Lhs.shl(Rhs);
+ default:
+ llvm_unreachable("Unknown Shift Opcode");
+ }
+ };
+
+ if (KnownVal.isUnknown())
+ return false;
+
+ KnownBits KnownCnt = DAG.computeKnownBits(I.getOperand(1), Depth + 1);
+ APInt MaxShift = KnownCnt.getMaxValue();
+ unsigned NumBits = KnownVal.getBitWidth();
+ if (MaxShift.uge(NumBits))
+ return false;
+
+ if (!ShiftOp(KnownVal.One, MaxShift).isZero())
+ return true;
+
+ // If all of the bits shifted out are known to be zero, and Val is known
+ // non-zero then at least one non-zero bit must remain.
+ if (InvShiftOp(KnownVal.Zero, NumBits - MaxShift)
+ .eq(InvShiftOp(APInt::getAllOnes(NumBits), NumBits - MaxShift)) &&
+ DAG.isKnownNeverZero(I.getOperand(0), Depth + 1))
+ return true;
+
+ return false;
+}
+
bool SelectionDAG::isKnownNeverZero(SDValue Op, unsigned Depth) const {
if (Depth >= MaxRecursionDepth)
return false; // Limit search depth.
@@ -5906,9 +5955,7 @@ bool SelectionDAG::isKnownNeverZero(SDValue Op, unsigned Depth) const {
if (ValKnown.One[0])
return true;
// If max shift cnt of known ones is non-zero, result is non-zero.
- APInt MaxCnt = computeKnownBits(Op.getOperand(1), Depth + 1).getMaxValue();
- if (MaxCnt.ult(ValKnown.getBitWidth()) &&
- !ValKnown.One.shl(MaxCnt).isZero())
+ if (isNonZeroShift(*this, Op, ValKnown, Depth))
return true;
break;
}
@@ -5968,10 +6015,8 @@ bool SelectionDAG::isKnownNeverZero(SDValue Op, unsigned Depth) const {
KnownBits ValKnown = computeKnownBits(Op.getOperand(0), Depth + 1);
if (ValKnown.isNegative())
return true;
- // If max shift cnt of known ones is non-zero, result is non-zero.
- APInt MaxCnt = computeKnownBits(Op.getOperand(1), Depth + 1).getMaxValue();
- if (MaxCnt.ult(ValKnown.getBitWidth()) &&
- !ValKnown.One.lshr(MaxCnt).isZero())
+
+ if (isNonZeroShift(*this, Op, ValKnown, Depth))
return true;
break;
}
>From a38acc61dbf14d37b0e034f5e611cc5776cfd9a4 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Fri, 27 Jun 2025 14:54:37 -0400
Subject: [PATCH 2/2] Fix
---
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index c4471ed42a0d4..3074cc825e07a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -5875,11 +5875,11 @@ static bool isNonZeroShift(const SelectionDAG &DAG, const SDValue I,
const KnownBits &KnownVal, unsigned Depth) {
auto ShiftOp = [&](const APInt &Lhs, const APInt &Rhs) {
switch (I.getOpcode()) {
- case Instruction::Shl:
+ case ISD::SHL:
return Lhs.shl(Rhs);
- case Instruction::LShr:
+ case ISD::SRL:
return Lhs.lshr(Rhs);
- case Instruction::AShr:
+ case ISD::SRA:
return Lhs.ashr(Rhs);
default:
llvm_unreachable("Unknown Shift Opcode");
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