[llvm] [NVPTX] support packed f32 instructions for sm_100+ (PR #126337)
Alex MacLean via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 27 09:08:52 PDT 2025
================
@@ -2118,15 +2146,10 @@ SDValue NVPTXTargetLowering::LowerBUILD_VECTOR(SDValue Op,
Value = Value.trunc(8);
return Value.zext(32);
};
- APInt Value;
- if (Isv2x16VT(VT)) {
- Value = GetOperand(Op, 0) | GetOperand(Op, 1).shl(16);
- } else if (VT == MVT::v4i8) {
- Value = GetOperand(Op, 0) | GetOperand(Op, 1).shl(8) |
- GetOperand(Op, 2).shl(16) | GetOperand(Op, 3).shl(24);
- } else {
- llvm_unreachable("Unsupported type");
- }
+
+ APInt Value(32, 0);
+ for (unsigned I = 0, E = VT.getVectorNumElements(), S = 32 / E; I != E; ++I)
----------------
AlexMaclean wrote:
Nit, I would pull some of these constants out of the for loop definition and use a foreach over llvm::seq
https://github.com/llvm/llvm-project/pull/126337
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