[llvm] [AArch64][Codegen]Transform saturating smull to sqdmulh (PR #143671)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 27 02:08:39 PDT 2025
================
@@ -20717,6 +20717,83 @@ static SDValue performBuildVectorCombine(SDNode *N,
return SDValue();
}
+// A special combine for the vqdmulh family of instructions.
+// truncate( smin( sra ( mul( sext v0, sext v1 ) ), SHIFT_AMOUNT ),
+// SATURATING_VAL ) can be reduced to sqdmulh(...)
+static SDValue trySQDMULHCombine(SDNode *N,
+ TargetLowering::DAGCombinerInfo &DCI,
+ SelectionDAG &DAG) {
+
+ if (N->getOpcode() != ISD::TRUNCATE)
+ return SDValue();
----------------
davemgreen wrote:
Can I make a strange suggestion - instead of matching `truncate( smin( sra(...)`, can we match `smin(sra(...` and produce `sext(sqdmulh(..))`. It has the chance of matching in more cases, and the trunc(sext()) should disappear where it is not necessary. (Providing it is equivalent of course).
https://github.com/llvm/llvm-project/pull/143671
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