[llvm] [X86] Avoid crashing in PIC mode on narrowing to i8 followed by extention to i32 (PR #145965)

[Matt Arsenault via llvm-commits]

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@@ -631,7 +631,8 @@ void InstrEmitter::EmitSubregNode(SDNode *Node, VRBaseMapType &VRBaseMap,
 void
 InstrEmitter::EmitCopyToRegClassNode(SDNode *Node,
                                      VRBaseMapType &VRBaseMap) {
-  Register VReg = getVR(Node->getOperand(0), VRBaseMap);
+  RegisterSDNode *R = dyn_cast<RegisterSDNode>(Node->getOperand(0));
+  unsigned VReg = R ? R->getReg() : getVR(Node->getOperand(0), VRBaseMap);
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arsenm wrote:

This looks like a workaround that just happens to work in this situation. If I run your test I see the "Node emitted out of order - late"" assert, which usually indicates there's a cycle in the DAG 

https://github.com/llvm/llvm-project/pull/145965