[llvm] [AMDGPU][MC] Allow opsel for v_max_i16 etc in GFX10 (PR #143982)

[Jun Wang via llvm-commits]

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@@ -211,6 +211,11 @@ multiclass VOP2Inst_e64_t16<string opName,
                         string revOp = opName> {
   let OtherPredicates = [Has16BitInsts], True16Predicate = NotHasTrue16BitInsts in {
     defm NAME : VOP2Inst<opName, P, node, revOp>;
+    let SubtargetPredicate = isGFX10Only in {
+      // V_MAX_I16 etc use VOP3 encoding and allow OP_SEL
+      def _opsel_e64 : VOP3InstBase <opName#"_vop3", VOP3_Profile<P, VOP3_OPSEL>, node, 1>,
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jwanggit86 wrote:

Using V_MAX_I16 as an example, the main reason that there are now two VOP3 pseudo instructions, `V_MAX_I16_e64` and `V_MAX_I16_opsel_e64` is because for this instruction, OPSEL is not allowed pre-gfx10, but is allowed in gfx10. Removing the old one would cause OPSEL to be allowed pre-gfx10. As to instruction selection, the new pseudo instruction (_opsel_e64) has a `isGFX10Only` predicate. So it's only selected for gfx10.

https://github.com/llvm/llvm-project/pull/143982