[llvm] [CodeGen/RISCV] Add fixed-vector [l]lround tests (PR #145926)

[Craig Topper via llvm-commits]

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@@ -0,0 +1,1814 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+v,+f,+d,+zvfh -target-abi=ilp32d \
+; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32
+; RUN: llc -mtriple=riscv64 -mattr=+v,+f,+d,+zvfh -target-abi=lp64d \
+; RUN:     -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64
+
+define <1 x i64> @llround_v1f16(<1 x half> %x) {
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topperc wrote:

Add `nounwind` to remove the .cfi directives from the output.

https://github.com/llvm/llvm-project/pull/145926