[llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)

[Janek van Oirschot via llvm-commits]

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@@ -15486,6 +15502,72 @@ SDValue SITargetLowering::performClampCombine(SDNode *N,
   return SDValue(CSrc, 0);
 }
 
+SDValue
+SITargetLowering::performBuildVectorCombine(SDNode *N,
+                                            DAGCombinerInfo &DCI) const {
+  const GCNSubtarget *ST = getSubtarget();
+  if (DCI.Level < AfterLegalizeDAG || !ST->hasMovB64())
+    return SDValue();
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JanekvO wrote:

I think that'd be in-line with a legalization of 64b build_vector elements on any subtarget (i.e., not guarded on subtargets with v_mov_b64). It would also mean removing the `AMDGPUTargetLowering::PerformDAGCombine` combine on `BITCAST` altogether since it undoes the combine here (i.e., inf loop). Personally, I'd prefer it in its own follow up patch. Particularly because of how many tests I see changed because of it (~140), I'd like a better scoped follow up on the regressions related to all of that.
But that's just my 0.02, let me know what you think.

https://github.com/llvm/llvm-project/pull/145052