[llvm] [AMDGPU][True16][CodeGen] stop emitting spgr_lo16 from isel (PR #144819)

[Brox Chen via llvm-commits]

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@@ -1088,7 +1088,7 @@ void SIFixSGPRCopies::lowerVGPR2SGPRCopies(MachineFunction &MF) {
       assert(MF.getSubtarget<GCNSubtarget>().useRealTrue16Insts() &&
              "We do not expect to see 16-bit copies from VGPR to SGPR unless "
              "we have 16-bit VGPRs");
-      assert(MRI->getRegClass(DstReg) == &AMDGPU::SGPR_LO16RegClass ||
+      assert(MRI->getRegClass(DstReg) == &AMDGPU::SGPR_32RegClass ||
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broxigarchen wrote:

I didn't check if we really need sgpr_32regclass here, maybe not. I can double check this

https://github.com/llvm/llvm-project/pull/144819