[llvm] a19ddff - [LoongArch] Pre-commit test for fixing xvshuf instructions. NFC

[Qi Zhao via llvm-commits]

Author: Qi Zhao
Date: 2025-06-26T18:48:30+08:00
New Revision: a19ddff980136835fead07b346bd83e9211124a0

URL: https://github.com/llvm/llvm-project/commit/a19ddff980136835fead07b346bd83e9211124a0
DIFF: https://github.com/llvm/llvm-project/commit/a19ddff980136835fead07b346bd83e9211124a0.diff

LOG: [LoongArch] Pre-commit test for fixing xvshuf instructions. NFC

For this test, the `xvshuf.d` instruction should not be generated.

This will be fixed later.

Added: 
    llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
new file mode 100644
index 0000000000000..21067031cb7bb
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
@@ -0,0 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc --mtriple=loongarch64 --mattr=+lasx %s -o - | FileCheck %s
+
+;; Fix https://github.com/llvm/llvm-project/issues/137000.
+
+define <4 x double> @shufflevector_v4f64(<4 x double> %a, <4 x double> %b) {
+; CHECK-LABEL: shufflevector_v4f64:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    pcalau12i $a0, %pc_hi20(.LCPI0_0)
+; CHECK-NEXT:    xvld $xr2, $a0, %pc_lo12(.LCPI0_0)
+; CHECK-NEXT:    xvshuf.d $xr2, $xr1, $xr0
+; CHECK-NEXT:    xvori.b $xr0, $xr2, 0
+; CHECK-NEXT:    ret
+entry:
+  %c = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 6, i32 3, i32 7>
+  ret <4 x double> %c
+}