[llvm] 7e67307 - AArch64: Remove deprecated AArch64MCExpr::Specifier
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 26 00:23:40 PDT 2025
Author: Fangrui Song
Date: 2025-06-26T00:23:35-07:00
New Revision: 7e67307fea97a7d25c094a37d4496f2e1d7c5299
URL: https://github.com/llvm/llvm-project/commit/7e67307fea97a7d25c094a37d4496f2e1d7c5299
DIFF: https://github.com/llvm/llvm-project/commit/7e67307fea97a7d25c094a37d4496f2e1d7c5299.diff
LOG: AArch64: Remove deprecated AArch64MCExpr::Specifier
Remove unneeded uses and replace the rest with AArch64::Specifier.
Added:
Modified:
llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp b/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
index f864404c1fd20..39946633603f6 100644
--- a/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
+++ b/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
@@ -263,10 +263,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO,
Expr = MCBinaryExpr::createAdd(
Expr, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
- AArch64MCExpr::Specifier RefKind;
- RefKind = static_cast<AArch64MCExpr::Specifier>(RefFlags);
- Expr = MCSpecifierExpr::create(Expr, RefKind, Ctx);
-
+ Expr = MCSpecifierExpr::create(Expr, RefFlags, Ctx);
return MCOperand::createExpr(Expr);
}
@@ -317,10 +314,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO,
Expr = MCBinaryExpr::createAdd(
Expr, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
- auto RefKind = static_cast<AArch64MCExpr::Specifier>(RefFlags);
- assert(RefKind != AArch64::S_INVALID && "Invalid relocation requested");
- Expr = MCSpecifierExpr::create(Expr, RefKind, Ctx);
-
+ Expr = MCSpecifierExpr::create(Expr, RefFlags, Ctx);
return MCOperand::createExpr(Expr);
}
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index f16fc6cfefa42..afc77a6db647b 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -340,9 +340,8 @@ class AArch64AsmParser : public MCTargetAsmParser {
unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
unsigned Kind) override;
- static bool classifySymbolRef(const MCExpr *Expr,
- AArch64MCExpr::Specifier &ELFSpec,
- AArch64MCExpr::Specifier &DarwinSpec,
+ static bool classifySymbolRef(const MCExpr *Expr, AArch64::Specifier &ELFSpec,
+ AArch64::Specifier &DarwinSpec,
int64_t &Addend);
};
@@ -891,8 +890,8 @@ class AArch64Operand : public MCParsedAsmOperand {
}
bool isSymbolicUImm12Offset(const MCExpr *Expr) const {
- AArch64MCExpr::Specifier ELFSpec;
- AArch64MCExpr::Specifier DarwinSpec;
+ AArch64::Specifier ELFSpec;
+ AArch64::Specifier DarwinSpec;
int64_t Addend;
if (!AArch64AsmParser::classifySymbolRef(Expr, ELFSpec, DarwinSpec,
Addend)) {
@@ -1007,8 +1006,8 @@ class AArch64Operand : public MCParsedAsmOperand {
Expr = getImm();
}
- AArch64MCExpr::Specifier ELFSpec;
- AArch64MCExpr::Specifier DarwinSpec;
+ AArch64::Specifier ELFSpec;
+ AArch64::Specifier DarwinSpec;
int64_t Addend;
if (AArch64AsmParser::classifySymbolRef(Expr, ELFSpec, DarwinSpec,
Addend)) {
@@ -1115,12 +1114,12 @@ class AArch64Operand : public MCParsedAsmOperand {
return (Val >= -((1<<(N-1)) << 2) && Val <= (((1<<(N-1))-1) << 2));
}
- bool isMovWSymbol(ArrayRef<AArch64MCExpr::Specifier> AllowedModifiers) const {
+ bool isMovWSymbol(ArrayRef<AArch64::Specifier> AllowedModifiers) const {
if (!isImm())
return false;
- AArch64MCExpr::Specifier ELFSpec;
- AArch64MCExpr::Specifier DarwinSpec;
+ AArch64::Specifier ELFSpec;
+ AArch64::Specifier DarwinSpec;
int64_t Addend;
if (!AArch64AsmParser::classifySymbolRef(getImm(), ELFSpec, DarwinSpec,
Addend)) {
@@ -3293,8 +3292,8 @@ ParseStatus AArch64AsmParser::tryParseAdrpLabel(OperandVector &Operands) {
if (parseSymbolicImmVal(Expr))
return ParseStatus::Failure;
- AArch64MCExpr::Specifier ELFSpec;
- AArch64MCExpr::Specifier DarwinSpec;
+ AArch64::Specifier ELFSpec;
+ AArch64::Specifier DarwinSpec;
int64_t Addend;
if (classifySymbolRef(Expr, ELFSpec, DarwinSpec, Addend)) {
if (DarwinSpec == AArch64::S_None && ELFSpec == AArch64::S_INVALID) {
@@ -3345,8 +3344,8 @@ ParseStatus AArch64AsmParser::tryParseAdrLabel(OperandVector &Operands) {
if (parseSymbolicImmVal(Expr))
return ParseStatus::Failure;
- AArch64MCExpr::Specifier ELFSpec;
- AArch64MCExpr::Specifier DarwinSpec;
+ AArch64::Specifier ELFSpec;
+ AArch64::Specifier DarwinSpec;
int64_t Addend;
if (classifySymbolRef(Expr, ELFSpec, DarwinSpec, Addend)) {
if (DarwinSpec == AArch64::S_None && ELFSpec == AArch64::S_INVALID) {
@@ -4393,7 +4392,7 @@ bool AArch64AsmParser::parseRegister(OperandVector &Operands) {
bool AArch64AsmParser::parseSymbolicImmVal(const MCExpr *&ImmVal) {
bool HasELFModifier = false;
- AArch64MCExpr::Specifier RefKind;
+ AArch64::Specifier RefKind;
if (parseOptionalToken(AsmToken::Colon)) {
HasELFModifier = true;
@@ -4402,7 +4401,7 @@ bool AArch64AsmParser::parseSymbolicImmVal(const MCExpr *&ImmVal) {
return TokError("expect relocation specifier in operand after ':'");
std::string LowerCase = getTok().getIdentifier().lower();
- RefKind = StringSwitch<AArch64MCExpr::Specifier>(LowerCase)
+ RefKind = StringSwitch<AArch64::Specifier>(LowerCase)
.Case("lo12", AArch64::S_LO12)
.Case("abs_g3", AArch64::S_ABS_G3)
.Case("abs_g2", AArch64::S_ABS_G2)
@@ -5836,8 +5835,8 @@ bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc,
// some slight duplication here.
if (Inst.getOperand(2).isExpr()) {
const MCExpr *Expr = Inst.getOperand(2).getExpr();
- AArch64MCExpr::Specifier ELFSpec;
- AArch64MCExpr::Specifier DarwinSpec;
+ AArch64::Specifier ELFSpec;
+ AArch64::Specifier DarwinSpec;
int64_t Addend;
if (classifySymbolRef(Expr, ELFSpec, DarwinSpec, Addend)) {
@@ -8270,8 +8269,8 @@ bool AArch64AsmParser::parseAuthExpr(const MCExpr *&Res, SMLoc &EndLoc) {
}
bool AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
- AArch64MCExpr::Specifier &ELFSpec,
- AArch64MCExpr::Specifier &DarwinSpec,
+ AArch64::Specifier &ELFSpec,
+ AArch64::Specifier &DarwinSpec,
int64_t &Addend) {
ELFSpec = AArch64::S_INVALID;
DarwinSpec = AArch64::S_None;
@@ -8285,7 +8284,7 @@ bool AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
const MCSymbolRefExpr *SE = dyn_cast<MCSymbolRefExpr>(Expr);
if (SE) {
// It's a simple symbol reference with no addend.
- DarwinSpec = AArch64MCExpr::Specifier(SE->getKind());
+ DarwinSpec = AArch64::Specifier(SE->getKind());
return true;
}
@@ -8301,7 +8300,7 @@ bool AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
return false;
if (Res.getAddSym())
- DarwinSpec = AArch64MCExpr::Specifier(Res.getSpecifier());
+ DarwinSpec = AArch64::Specifier(Res.getSpecifier());
Addend = Res.getConstant();
// It's some symbol reference + a constant addend, but really
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
index 38ea57161209c..0ff51c7161539 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
@@ -219,8 +219,8 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target,
Ctx.reportError(Fixup.getLoc(), "fixup must be 16-byte aligned");
return Value >> 4;
case AArch64::fixup_aarch64_movw: {
- AArch64MCExpr::Specifier RefKind =
- static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
+ AArch64::Specifier RefKind =
+ static_cast<AArch64::Specifier>(Target.getSpecifier());
if (AArch64::getSymbolLoc(RefKind) != AArch64::S_ABS &&
AArch64::getSymbolLoc(RefKind) != AArch64::S_SABS) {
if (!RefKind) {
@@ -421,8 +421,8 @@ void AArch64AsmBackend::applyFixup(const MCFragment &, const MCFixup &Fixup,
return;
if (Fixup.getTargetKind() == FK_Data_8 && TheTriple.isOSBinFormatELF()) {
- auto RefKind = static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
- AArch64MCExpr::Specifier SymLoc = AArch64::getSymbolLoc(RefKind);
+ auto RefKind = static_cast<AArch64::Specifier>(Target.getSpecifier());
+ AArch64::Specifier SymLoc = AArch64::getSymbolLoc(RefKind);
if (SymLoc == AArch64::S_AUTH || SymLoc == AArch64::S_AUTHADDR) {
const auto *Expr = dyn_cast<AArch64AuthMCExpr>(Fixup.getValue());
if (!Expr) {
@@ -474,8 +474,8 @@ void AArch64AsmBackend::applyFixup(const MCFragment &, const MCFixup &Fixup,
// FIXME: getFixupKindInfo() and getFixupKindNumBytes() could be fixed to
// handle this more cleanly. This may affect the output of -show-mc-encoding.
- AArch64MCExpr::Specifier RefKind =
- static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
+ AArch64::Specifier RefKind =
+ static_cast<AArch64::Specifier>(Target.getSpecifier());
if (AArch64::getSymbolLoc(RefKind) == AArch64::S_SABS ||
(!RefKind && Fixup.getTargetKind() == AArch64::fixup_aarch64_movw)) {
// If the immediate is negative, generate MOVN else MOVZ.
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
index ebd5f30796195..c3881fc79ba62 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
@@ -39,8 +39,7 @@ class AArch64ELFObjectWriter : public MCELFObjectTargetWriter {
unsigned getRelocType(const MCFixup &, const MCValue &,
bool IsPCRel) const override;
bool needsRelocateWithSymbol(const MCValue &, unsigned Type) const override;
- bool isNonILP32reloc(const MCFixup &Fixup,
- AArch64MCExpr::Specifier RefKind) const;
+ bool isNonILP32reloc(const MCFixup &Fixup, AArch64::Specifier RefKind) const;
bool IsILP32;
};
@@ -56,8 +55,8 @@ AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32)
IsILP32 ? ELF::R_AARCH64_P32_##rtype : ELF::R_AARCH64_##rtype
// assumes IsILP32 is true
-bool AArch64ELFObjectWriter::isNonILP32reloc(
- const MCFixup &Fixup, AArch64MCExpr::Specifier RefKind) const {
+bool AArch64ELFObjectWriter::isNonILP32reloc(const MCFixup &Fixup,
+ AArch64::Specifier RefKind) const {
if (Fixup.getTargetKind() != AArch64::fixup_aarch64_movw)
return false;
switch (RefKind) {
@@ -86,9 +85,9 @@ unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup,
const MCValue &Target,
bool IsPCRel) const {
unsigned Kind = Fixup.getTargetKind();
- AArch64MCExpr::Specifier RefKind =
- static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
- AArch64MCExpr::Specifier SymLoc = AArch64::getSymbolLoc(RefKind);
+ AArch64::Specifier RefKind =
+ static_cast<AArch64::Specifier>(Target.getSpecifier());
+ AArch64::Specifier SymLoc = AArch64::getSymbolLoc(RefKind);
bool IsNC = AArch64::isNotChecked(RefKind);
switch (SymLoc) {
@@ -117,9 +116,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup,
case FK_Data_2:
return R_CLS(PREL16);
case FK_Data_4: {
- return AArch64MCExpr::Specifier(Target.getSpecifier()) == AArch64::S_PLT
- ? R_CLS(PLT32)
- : R_CLS(PREL32);
+ return Target.getSpecifier() == AArch64::S_PLT ? R_CLS(PLT32)
+ : R_CLS(PREL32);
}
case FK_Data_8:
if (IsILP32) {
@@ -221,8 +219,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup,
case FK_Data_2:
return R_CLS(ABS16);
case FK_Data_4:
- return (!IsILP32 && AArch64MCExpr::Specifier(Target.getSpecifier()) ==
- AArch64::S_GOTPCREL)
+ return (!IsILP32 && Target.getSpecifier() == AArch64::S_GOTPCREL)
? ELF::R_AARCH64_GOTPCREL32
: R_CLS(ABS32);
case FK_Data_8: {
@@ -352,7 +349,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup,
if (SymLoc == AArch64::S_ABS && IsNC)
return R_CLS(LDST64_ABS_LO12_NC);
if ((SymLoc == AArch64::S_GOT || SymLoc == AArch64::S_GOT_AUTH) && IsNC) {
- AArch64MCExpr::Specifier AddressLoc = AArch64::getAddressFrag(RefKind);
+ AArch64::Specifier AddressLoc = AArch64::getAddressFrag(RefKind);
bool IsAuth = (SymLoc == AArch64::S_GOT_AUTH);
if (!IsILP32) {
if (AddressLoc == AArch64::S_LO15)
@@ -497,7 +494,7 @@ bool AArch64ELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
if ((Val.getSpecifier() & AArch64::S_GOT) == AArch64::S_GOT)
return true;
return is_contained({AArch64::S_GOTPCREL, AArch64::S_PLT},
- AArch64MCExpr::Specifier(Val.getSpecifier()));
+ Val.getSpecifier());
}
std::unique_ptr<MCObjectTargetWriter>
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
index bf1eb091fe754..a1034934e646d 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
@@ -309,7 +309,7 @@ AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx,
// Set the shift bit of the add instruction for relocation types
// R_AARCH64_TLSLE_ADD_TPREL_HI12 and R_AARCH64_TLSLD_ADD_DTPREL_HI12.
if (auto *A64E = dyn_cast<MCSpecifierExpr>(Expr)) {
- AArch64MCExpr::Specifier RefKind = A64E->getSpecifier();
+ AArch64::Specifier RefKind = A64E->getSpecifier();
if (RefKind == AArch64::S_TPREL_HI12 || RefKind == AArch64::S_DTPREL_HI12 ||
RefKind == AArch64::S_SECREL_HI12)
ShiftVal = 12;
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
index 0148088ac1da5..d31a0969ebd67 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h
@@ -21,9 +21,6 @@
namespace llvm {
-namespace AArch64MCExpr {
-using Specifier = uint16_t;
-} // namespace AArch64MCExpr
} // end namespace llvm
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
index 2ade306c196e6..7d849d3cb3153 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp
@@ -34,8 +34,8 @@ namespace {
class AArch64MachObjectWriter : public MCMachObjectTargetWriter {
bool getAArch64FixupKindMachOInfo(const MCFixup &Fixup, unsigned &RelocType,
- AArch64MCExpr::Specifier Spec,
- unsigned &Log2Size, const MCAssembler &Asm);
+ AArch64::Specifier Spec, unsigned &Log2Size,
+ const MCAssembler &Asm);
public:
AArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype, bool IsILP32)
@@ -49,7 +49,7 @@ class AArch64MachObjectWriter : public MCMachObjectTargetWriter {
} // end anonymous namespace
bool AArch64MachObjectWriter::getAArch64FixupKindMachOInfo(
- const MCFixup &Fixup, unsigned &RelocType, AArch64MCExpr::Specifier Spec,
+ const MCFixup &Fixup, unsigned &RelocType, AArch64::Specifier Spec,
unsigned &Log2Size, const MCAssembler &Asm) {
RelocType = unsigned(MachO::ARM64_RELOC_UNSIGNED);
Log2Size = ~0U;
@@ -189,9 +189,8 @@ void AArch64MachObjectWriter::recordRelocation(
return;
}
- if (!getAArch64FixupKindMachOInfo(
- Fixup, Type, AArch64MCExpr::Specifier(Target.getSpecifier()),
- Log2Size, Asm)) {
+ if (!getAArch64FixupKindMachOInfo(Fixup, Type, Target.getSpecifier(),
+ Log2Size, Asm)) {
reportError(Fixup.getLoc(), "unknown AArch64 fixup kind!");
return;
}
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
index 35727b916b650..eecde7a161214 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp
@@ -65,7 +65,7 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType(
const MCExpr *Expr = Fixup.getValue();
if (auto *A64E = dyn_cast<MCSpecifierExpr>(Expr)) {
- AArch64MCExpr::Specifier Spec = A64E->getSpecifier();
+ AArch64::Specifier Spec = A64E->getSpecifier();
switch (AArch64::getSymbolLoc(Spec)) {
case AArch64::S_ABS:
case AArch64::S_SECREL:
@@ -117,7 +117,7 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType(
case AArch64::fixup_aarch64_add_imm12:
if (auto *A64E = dyn_cast<MCSpecifierExpr>(Expr)) {
- AArch64MCExpr::Specifier Spec = A64E->getSpecifier();
+ AArch64::Specifier Spec = A64E->getSpecifier();
if (Spec == AArch64::S_SECREL_LO12)
return COFF::IMAGE_REL_ARM64_SECREL_LOW12A;
if (Spec == AArch64::S_SECREL_HI12)
@@ -131,7 +131,7 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType(
case AArch64::fixup_aarch64_ldst_imm12_scale8:
case AArch64::fixup_aarch64_ldst_imm12_scale16:
if (auto *A64E = dyn_cast<MCSpecifierExpr>(Expr)) {
- AArch64MCExpr::Specifier Spec = A64E->getSpecifier();
+ AArch64::Specifier Spec = A64E->getSpecifier();
if (Spec == AArch64::S_SECREL_LO12)
return COFF::IMAGE_REL_ARM64_SECREL_LOW12L;
}
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