[llvm] [RISCV] Use SelectAddrRegRegScale for Xqcisls instructions. (PR #145608)

[Craig Topper via llvm-commits]

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@@ -423,13 +417,14 @@ define i64 @lrd_2(ptr %a, i64 %b) {
 ;
 ; RV32IZBAXQCISLS-LABEL: lrd_2:
 ; RV32IZBAXQCISLS:       # %bb.0:
-; RV32IZBAXQCISLS-NEXT:    sh3add a0, a1, a0
-; RV32IZBAXQCISLS-NEXT:    lw a1, 96(a0)
-; RV32IZBAXQCISLS-NEXT:    lw a2, 100(a0)
-; RV32IZBAXQCISLS-NEXT:    add a0, a1, a1
-; RV32IZBAXQCISLS-NEXT:    sltu a1, a0, a1
-; RV32IZBAXQCISLS-NEXT:    add a2, a2, a2
-; RV32IZBAXQCISLS-NEXT:    add a1, a2, a1
+; RV32IZBAXQCISLS-NEXT:    addi a2, a0, 96
+; RV32IZBAXQCISLS-NEXT:    qc.lrw a2, a2, a1, 3
+; RV32IZBAXQCISLS-NEXT:    addi a0, a0, 100
+; RV32IZBAXQCISLS-NEXT:    qc.lrw a1, a0, a1, 3
+; RV32IZBAXQCISLS-NEXT:    add a0, a2, a2
+; RV32IZBAXQCISLS-NEXT:    sltu a2, a0, a2
+; RV32IZBAXQCISLS-NEXT:    add a1, a1, a1
+; RV32IZBAXQCISLS-NEXT:    add a1, a1, a2
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topperc wrote:

Indeed. The code doesn't do any profitability checks to make sure the shift doesn't have other users. I'll see if I can do a follow up to fix it.

https://github.com/llvm/llvm-project/pull/145608