[llvm] b6b0811 - [AMDGPU] Simplify S_WAIT_XCNT insertion. NFC. (#145682)

[via llvm-commits]

Author: Jay Foad
Date: 2025-06-25T20:56:41+01:00
New Revision: b6b08117bdb48765a0eef71b8434b9341257d06e

URL: https://github.com/llvm/llvm-project/commit/b6b08117bdb48765a0eef71b8434b9341257d06e
DIFF: https://github.com/llvm/llvm-project/commit/b6b08117bdb48765a0eef71b8434b9341257d06e.diff

LOG: [AMDGPU] Simplify S_WAIT_XCNT insertion. NFC. (#145682)

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 41e1f0586e36c..fdd5834e3b9a7 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -302,12 +302,8 @@ class WaitcntBrackets {
   }
 
   unsigned getSgprScoresIdx(InstCounterType T) const {
-    if (T == SmemAccessCounter)
-      return 0;
-    if (T == X_CNT)
-      return 1;
-
-    llvm_unreachable("Invalid SMEM counter");
+    assert(isSmemCounter(T) && "Invalid SMEM counter");
+    return T == X_CNT ? 1 : 0;
   }
 
   unsigned getScoreLB(InstCounterType T) const {
@@ -325,10 +321,8 @@ class WaitcntBrackets {
   }
 
   unsigned getRegScore(int GprNo, InstCounterType T) const {
-    if (GprNo < NUM_ALL_VGPRS) {
+    if (GprNo < NUM_ALL_VGPRS)
       return VgprScores[T][GprNo];
-    }
-    assert(isSmemCounter(T));
     return SgprScores[getSgprScoresIdx(T)][GprNo - NUM_ALL_VGPRS];
   }
 
@@ -866,7 +860,6 @@ void WaitcntBrackets::setScoreByInterval(RegInterval Interval,
       VgprUB = std::max(VgprUB, RegNo);
       VgprScores[CntTy][RegNo] = Score;
     } else {
-      assert(isSmemCounter(CntTy));
       SgprUB = std::max(SgprUB, RegNo - NUM_ALL_VGPRS);
       SgprScores[getSgprScoresIdx(CntTy)][RegNo - NUM_ALL_VGPRS] = Score;
     }
@@ -1006,12 +999,8 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
       }
     }
   } else if (T == X_CNT) {
-    for (const MachineOperand &Op : Inst.all_uses()) {
-      RegInterval Interval = getRegInterval(&Inst, MRI, TRI, Op);
-      for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo) {
-        setRegScore(RegNo, T, CurrScore);
-      }
-    }
+    for (const MachineOperand &Op : Inst.all_uses())
+      setScoreByOperand(&Inst, TRI, MRI, Op, T, CurrScore);
   } else /* LGKM_CNT || EXP_CNT || VS_CNT || NUM_INST_CNTS */ {
     // Match the score to the destination registers.
     //