[llvm] [ARM] Override hasAndNotCompare (PR #145441)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 25 12:46:21 PDT 2025
https://github.com/AZero13 updated https://github.com/llvm/llvm-project/pull/145441
>From 2ee5bb4af52cd47cd709bd04d66ea7ba31c4178e Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Mon, 23 Jun 2025 17:19:15 -0400
Subject: [PATCH] [ARM] Override hasAndNotCompare
bics is available on ARM.
---
llvm/lib/Target/ARM/ARMISelLowering.h | 5 +
llvm/test/CodeGen/ARM/fpclamptosat.ll | 189 ++++++++------------------
llvm/test/CodeGen/ARM/usat.ll | 12 +-
3 files changed, 63 insertions(+), 143 deletions(-)
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index 9c330e60a7d54..604910e04d4cc 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -609,6 +609,11 @@ class VectorType;
bool isMaskAndCmp0FoldingBeneficial(const Instruction &AndI) const override;
+ bool hasAndNotCompare(SDValue V) const override {
+ // We can use bics for any scalar.
+ return V.getValueType().isScalarInteger();
+ }
+
bool
isShuffleMaskLegal(ArrayRef<int> M, EVT VT) const override;
bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
diff --git a/llvm/test/CodeGen/ARM/fpclamptosat.ll b/llvm/test/CodeGen/ARM/fpclamptosat.ll
index 478b98dfac80f..59230a377900c 100644
--- a/llvm/test/CodeGen/ARM/fpclamptosat.ll
+++ b/llvm/test/CodeGen/ARM/fpclamptosat.ll
@@ -1101,59 +1101,32 @@ entry:
define i64 @ustest_f64i64(double %x) {
; SOFT-LABEL: ustest_f64i64:
; SOFT: @ %bb.0: @ %entry
-; SOFT-NEXT: .save {r4, r5, r6, lr}
-; SOFT-NEXT: push {r4, r5, r6, lr}
+; SOFT-NEXT: .save {r4, lr}
+; SOFT-NEXT: push {r4, lr}
; SOFT-NEXT: bl __fixdfti
-; SOFT-NEXT: movs r4, #1
-; SOFT-NEXT: movs r5, #0
-; SOFT-NEXT: subs r6, r2, #1
-; SOFT-NEXT: mov r6, r3
-; SOFT-NEXT: sbcs r6, r5
-; SOFT-NEXT: bge .LBB20_9
+; SOFT-NEXT: movs r4, #0
+; SOFT-NEXT: subs r2, r2, #1
+; SOFT-NEXT: mov r2, r3
+; SOFT-NEXT: sbcs r2, r4
+; SOFT-NEXT: bge .LBB20_5
; SOFT-NEXT: @ %bb.1: @ %entry
-; SOFT-NEXT: bge .LBB20_10
+; SOFT-NEXT: bge .LBB20_6
; SOFT-NEXT: .LBB20_2: @ %entry
-; SOFT-NEXT: bge .LBB20_11
+; SOFT-NEXT: blt .LBB20_4
; SOFT-NEXT: .LBB20_3: @ %entry
-; SOFT-NEXT: blt .LBB20_5
+; SOFT-NEXT: mov r3, r4
; SOFT-NEXT: .LBB20_4: @ %entry
-; SOFT-NEXT: mov r0, r5
+; SOFT-NEXT: asrs r2, r3, #31
+; SOFT-NEXT: bics r0, r2
+; SOFT-NEXT: bics r1, r2
+; SOFT-NEXT: pop {r4, pc}
; SOFT-NEXT: .LBB20_5: @ %entry
-; SOFT-NEXT: rsbs r6, r0, #0
-; SOFT-NEXT: mov r6, r5
-; SOFT-NEXT: sbcs r6, r1
-; SOFT-NEXT: mov r6, r5
-; SOFT-NEXT: sbcs r6, r2
-; SOFT-NEXT: mov r2, r5
-; SOFT-NEXT: sbcs r2, r3
-; SOFT-NEXT: bge .LBB20_12
-; SOFT-NEXT: @ %bb.6: @ %entry
-; SOFT-NEXT: cmp r4, #0
-; SOFT-NEXT: beq .LBB20_13
-; SOFT-NEXT: .LBB20_7: @ %entry
-; SOFT-NEXT: beq .LBB20_14
-; SOFT-NEXT: .LBB20_8: @ %entry
-; SOFT-NEXT: pop {r4, r5, r6, pc}
-; SOFT-NEXT: .LBB20_9: @ %entry
-; SOFT-NEXT: mov r3, r5
+; SOFT-NEXT: mov r1, r4
; SOFT-NEXT: blt .LBB20_2
-; SOFT-NEXT: .LBB20_10: @ %entry
-; SOFT-NEXT: mov r2, r4
-; SOFT-NEXT: blt .LBB20_3
-; SOFT-NEXT: .LBB20_11: @ %entry
-; SOFT-NEXT: mov r1, r5
-; SOFT-NEXT: bge .LBB20_4
-; SOFT-NEXT: b .LBB20_5
-; SOFT-NEXT: .LBB20_12: @ %entry
-; SOFT-NEXT: mov r4, r5
-; SOFT-NEXT: cmp r4, #0
-; SOFT-NEXT: bne .LBB20_7
-; SOFT-NEXT: .LBB20_13: @ %entry
+; SOFT-NEXT: .LBB20_6: @ %entry
; SOFT-NEXT: mov r0, r4
-; SOFT-NEXT: bne .LBB20_8
-; SOFT-NEXT: .LBB20_14: @ %entry
-; SOFT-NEXT: mov r1, r4
-; SOFT-NEXT: pop {r4, r5, r6, pc}
+; SOFT-NEXT: bge .LBB20_3
+; SOFT-NEXT: b .LBB20_4
;
; VFP2-LABEL: ustest_f64i64:
; VFP2: @ %bb.0: @ %entry
@@ -1400,59 +1373,32 @@ entry:
define i64 @ustest_f32i64(float %x) {
; SOFT-LABEL: ustest_f32i64:
; SOFT: @ %bb.0: @ %entry
-; SOFT-NEXT: .save {r4, r5, r6, lr}
-; SOFT-NEXT: push {r4, r5, r6, lr}
+; SOFT-NEXT: .save {r4, lr}
+; SOFT-NEXT: push {r4, lr}
; SOFT-NEXT: bl __fixsfti
-; SOFT-NEXT: movs r4, #1
-; SOFT-NEXT: movs r5, #0
-; SOFT-NEXT: subs r6, r2, #1
-; SOFT-NEXT: mov r6, r3
-; SOFT-NEXT: sbcs r6, r5
-; SOFT-NEXT: bge .LBB23_9
+; SOFT-NEXT: movs r4, #0
+; SOFT-NEXT: subs r2, r2, #1
+; SOFT-NEXT: mov r2, r3
+; SOFT-NEXT: sbcs r2, r4
+; SOFT-NEXT: bge .LBB23_5
; SOFT-NEXT: @ %bb.1: @ %entry
-; SOFT-NEXT: bge .LBB23_10
+; SOFT-NEXT: bge .LBB23_6
; SOFT-NEXT: .LBB23_2: @ %entry
-; SOFT-NEXT: bge .LBB23_11
+; SOFT-NEXT: blt .LBB23_4
; SOFT-NEXT: .LBB23_3: @ %entry
-; SOFT-NEXT: blt .LBB23_5
+; SOFT-NEXT: mov r3, r4
; SOFT-NEXT: .LBB23_4: @ %entry
-; SOFT-NEXT: mov r0, r5
+; SOFT-NEXT: asrs r2, r3, #31
+; SOFT-NEXT: bics r0, r2
+; SOFT-NEXT: bics r1, r2
+; SOFT-NEXT: pop {r4, pc}
; SOFT-NEXT: .LBB23_5: @ %entry
-; SOFT-NEXT: rsbs r6, r0, #0
-; SOFT-NEXT: mov r6, r5
-; SOFT-NEXT: sbcs r6, r1
-; SOFT-NEXT: mov r6, r5
-; SOFT-NEXT: sbcs r6, r2
-; SOFT-NEXT: mov r2, r5
-; SOFT-NEXT: sbcs r2, r3
-; SOFT-NEXT: bge .LBB23_12
-; SOFT-NEXT: @ %bb.6: @ %entry
-; SOFT-NEXT: cmp r4, #0
-; SOFT-NEXT: beq .LBB23_13
-; SOFT-NEXT: .LBB23_7: @ %entry
-; SOFT-NEXT: beq .LBB23_14
-; SOFT-NEXT: .LBB23_8: @ %entry
-; SOFT-NEXT: pop {r4, r5, r6, pc}
-; SOFT-NEXT: .LBB23_9: @ %entry
-; SOFT-NEXT: mov r3, r5
+; SOFT-NEXT: mov r1, r4
; SOFT-NEXT: blt .LBB23_2
-; SOFT-NEXT: .LBB23_10: @ %entry
-; SOFT-NEXT: mov r2, r4
-; SOFT-NEXT: blt .LBB23_3
-; SOFT-NEXT: .LBB23_11: @ %entry
-; SOFT-NEXT: mov r1, r5
-; SOFT-NEXT: bge .LBB23_4
-; SOFT-NEXT: b .LBB23_5
-; SOFT-NEXT: .LBB23_12: @ %entry
-; SOFT-NEXT: mov r4, r5
-; SOFT-NEXT: cmp r4, #0
-; SOFT-NEXT: bne .LBB23_7
-; SOFT-NEXT: .LBB23_13: @ %entry
+; SOFT-NEXT: .LBB23_6: @ %entry
; SOFT-NEXT: mov r0, r4
-; SOFT-NEXT: bne .LBB23_8
-; SOFT-NEXT: .LBB23_14: @ %entry
-; SOFT-NEXT: mov r1, r4
-; SOFT-NEXT: pop {r4, r5, r6, pc}
+; SOFT-NEXT: bge .LBB23_3
+; SOFT-NEXT: b .LBB23_4
;
; VFP2-LABEL: ustest_f32i64:
; VFP2: @ %bb.0: @ %entry
@@ -1713,61 +1659,34 @@ entry:
define i64 @ustest_f16i64(half %x) {
; SOFT-LABEL: ustest_f16i64:
; SOFT: @ %bb.0: @ %entry
-; SOFT-NEXT: .save {r4, r5, r6, lr}
-; SOFT-NEXT: push {r4, r5, r6, lr}
+; SOFT-NEXT: .save {r4, lr}
+; SOFT-NEXT: push {r4, lr}
; SOFT-NEXT: uxth r0, r0
; SOFT-NEXT: bl __aeabi_h2f
; SOFT-NEXT: bl __fixsfti
-; SOFT-NEXT: movs r4, #1
-; SOFT-NEXT: movs r5, #0
-; SOFT-NEXT: subs r6, r2, #1
-; SOFT-NEXT: mov r6, r3
-; SOFT-NEXT: sbcs r6, r5
-; SOFT-NEXT: bge .LBB26_9
+; SOFT-NEXT: movs r4, #0
+; SOFT-NEXT: subs r2, r2, #1
+; SOFT-NEXT: mov r2, r3
+; SOFT-NEXT: sbcs r2, r4
+; SOFT-NEXT: bge .LBB26_5
; SOFT-NEXT: @ %bb.1: @ %entry
-; SOFT-NEXT: bge .LBB26_10
+; SOFT-NEXT: bge .LBB26_6
; SOFT-NEXT: .LBB26_2: @ %entry
-; SOFT-NEXT: bge .LBB26_11
+; SOFT-NEXT: blt .LBB26_4
; SOFT-NEXT: .LBB26_3: @ %entry
-; SOFT-NEXT: blt .LBB26_5
+; SOFT-NEXT: mov r3, r4
; SOFT-NEXT: .LBB26_4: @ %entry
-; SOFT-NEXT: mov r0, r5
+; SOFT-NEXT: asrs r2, r3, #31
+; SOFT-NEXT: bics r0, r2
+; SOFT-NEXT: bics r1, r2
+; SOFT-NEXT: pop {r4, pc}
; SOFT-NEXT: .LBB26_5: @ %entry
-; SOFT-NEXT: rsbs r6, r0, #0
-; SOFT-NEXT: mov r6, r5
-; SOFT-NEXT: sbcs r6, r1
-; SOFT-NEXT: mov r6, r5
-; SOFT-NEXT: sbcs r6, r2
-; SOFT-NEXT: mov r2, r5
-; SOFT-NEXT: sbcs r2, r3
-; SOFT-NEXT: bge .LBB26_12
-; SOFT-NEXT: @ %bb.6: @ %entry
-; SOFT-NEXT: cmp r4, #0
-; SOFT-NEXT: beq .LBB26_13
-; SOFT-NEXT: .LBB26_7: @ %entry
-; SOFT-NEXT: beq .LBB26_14
-; SOFT-NEXT: .LBB26_8: @ %entry
-; SOFT-NEXT: pop {r4, r5, r6, pc}
-; SOFT-NEXT: .LBB26_9: @ %entry
-; SOFT-NEXT: mov r3, r5
+; SOFT-NEXT: mov r1, r4
; SOFT-NEXT: blt .LBB26_2
-; SOFT-NEXT: .LBB26_10: @ %entry
-; SOFT-NEXT: mov r2, r4
-; SOFT-NEXT: blt .LBB26_3
-; SOFT-NEXT: .LBB26_11: @ %entry
-; SOFT-NEXT: mov r1, r5
-; SOFT-NEXT: bge .LBB26_4
-; SOFT-NEXT: b .LBB26_5
-; SOFT-NEXT: .LBB26_12: @ %entry
-; SOFT-NEXT: mov r4, r5
-; SOFT-NEXT: cmp r4, #0
-; SOFT-NEXT: bne .LBB26_7
-; SOFT-NEXT: .LBB26_13: @ %entry
+; SOFT-NEXT: .LBB26_6: @ %entry
; SOFT-NEXT: mov r0, r4
-; SOFT-NEXT: bne .LBB26_8
-; SOFT-NEXT: .LBB26_14: @ %entry
-; SOFT-NEXT: mov r1, r4
-; SOFT-NEXT: pop {r4, r5, r6, pc}
+; SOFT-NEXT: bge .LBB26_3
+; SOFT-NEXT: b .LBB26_4
;
; VFP2-LABEL: ustest_f16i64:
; VFP2: @ %bb.0: @ %entry
diff --git a/llvm/test/CodeGen/ARM/usat.ll b/llvm/test/CodeGen/ARM/usat.ll
index d01aa1520b326..b3b81daba7f3c 100644
--- a/llvm/test/CodeGen/ARM/usat.ll
+++ b/llvm/test/CodeGen/ARM/usat.ll
@@ -57,11 +57,9 @@ define i16 @unsigned_sat_base_16bit(i16 %x) #0 {
; V4T-NEXT: orr r2, r2, #1792
; V4T-NEXT: asr r1, r1, #16
; V4T-NEXT: cmp r1, r2
-; V4T-NEXT: movge r0, r2
-; V4T-NEXT: lsl r1, r0, #16
-; V4T-NEXT: asr r1, r1, #16
-; V4T-NEXT: cmp r1, #0
-; V4T-NEXT: movle r0, #0
+; V4T-NEXT: movlt r2, r0
+; V4T-NEXT: lsl r0, r2, #16
+; V4T-NEXT: bic r0, r2, r0, asr #31
; V4T-NEXT: bx lr
;
; V6-LABEL: unsigned_sat_base_16bit:
@@ -104,9 +102,7 @@ define i8 @unsigned_sat_base_8bit(i8 %x) #0 {
; V4T-NEXT: cmp r1, #31
; V4T-NEXT: movge r0, #31
; V4T-NEXT: lsl r1, r0, #24
-; V4T-NEXT: asr r1, r1, #24
-; V4T-NEXT: cmp r1, #0
-; V4T-NEXT: movle r0, #0
+; V4T-NEXT: bic r0, r0, r1, asr #31
; V4T-NEXT: bx lr
;
; V6-LABEL: unsigned_sat_base_8bit:
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