[llvm] [llvm-exegesis] [AArch64] Resolving "not all operands are initialized by snippet generator" (PR #142529)

Lakshay Kumar via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 25 03:23:45 PDT 2025


================
@@ -229,6 +233,41 @@ class ExegesisAArch64Target : public ExegesisTarget {
   }
 };
 
+Error ExegesisAArch64Target::randomizeTargetMCOperand(
+    const Instruction &Instr, const Variable &Var, MCOperand &AssignedValue,
+    const BitVector &ForbiddenRegs) const {
+  const Operand &Op = Instr.getPrimaryOperand(Var);
+  const auto OperandType = Op.getExplicitOperandInfo().OperandType;
+  // TODO: Look into immediate values to be opcode specific for
+  // MRS, MSR, MSRpstatesvcrImm1, SYSLxt, SYSxt, UDF (illegal instruction)
+  switch (OperandType) {
+  case MCOI::OperandType::OPERAND_UNKNOWN: {
+    unsigned Opcode = Instr.getOpcode();
+    switch (Opcode) {
+    case AArch64::MOVIv2s_msl:
+    case AArch64::MOVIv4s_msl:
+    case AArch64::MVNIv2s_msl:
+    case AArch64::MVNIv4s_msl:
+      AssignedValue = MCOperand::createImm(8); // or 16
+      return Error::success();
+    default:
+      AssignedValue = MCOperand::createImm(0);
+      return Error::success();
+    }
+  }
+  case MCOI::OperandType::OPERAND_PCREL:
+  case MCOI::OperandType::OPERAND_FIRST_TARGET:
+    AssignedValue = MCOperand::createImm(0);
+    return Error::success();
+  default:
----------------
lakshayk-nv wrote:

>The description of this patch isn't clear to me
>>
Updated description to be more descriptive with problem and what this patch is aiming to resolve it.

https://github.com/llvm/llvm-project/pull/142529


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