[llvm] [feature][riscv] handle target address calculation in llvm-objdump disassembly for riscv (PR #144620)
Arjun Patel via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 24 10:12:33 PDT 2025
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@@ -0,0 +1,32 @@
+# RUN: llvm-mc -riscv-add-build-attributes -triple=riscv32 -filetype=obj -mattr=+zclsd,+zilsd %s -o %t
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arjunUpatel wrote:
- Explanation for ar: short for address resolution
- Explanation for coverage: mostly pulls from code coverage. Many of the instructions do the same thing during address resolution. So instead of redundantly testing each and every one of them, I picked a few of them from different extensions and those the behaved differently under different circumstances (rv32 vs 64) to make sure that the various extensions are supported properly and address resolution works under different circumstances like long jumps of the target address and unrelated instructions in between pairs of instructions.
https://github.com/llvm/llvm-project/pull/144620
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