[llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)

[Matt Arsenault via llvm-commits]

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@@ -440,6 +440,8 @@ void AMDGPUDAGToDAGISel::SelectBuildVector(SDNode *N, unsigned RegClassID) {
   EVT EltVT = VT.getVectorElementType();
   SDLoc DL(N);
   SDValue RegClass = CurDAG->getTargetConstant(RegClassID, DL, MVT::i32);
+  unsigned NumRegs = EltVT.getSizeInBits() / 32;
+  bool IsGCN = CurDAG->getSubtarget().getTargetTriple().isAMDGCN();
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arsenm wrote:

```suggestion
  bool IsGCN = TM.getTargetTriple().isAMDGCN();
```

https://github.com/llvm/llvm-project/pull/145052