[llvm] [AMDGPU] Legalize 64bit elements for BUILD_VECTOR on gfx942 (PR #145052)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 24 10:03:43 PDT 2025
================
@@ -5206,6 +5206,14 @@ SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N,
case ISD::BITCAST: {
EVT DestVT = N->getValueType(0);
+ // Avoid undoing build_vector with 64b elements if subtarget supports 64b
+ // movs (i.e., avoid inf loop through combines).
+ if (Subtarget->isGCN()) {
+ const GCNSubtarget &ST = DAG.getSubtarget<GCNSubtarget>();
+ if (ST.hasMovB64())
+ break;
+ }
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arsenm wrote:
Move this into the SITargetLowering one and avoid calling the base class implementation instead
https://github.com/llvm/llvm-project/pull/145052
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