[llvm] [RISCV] Remove -mattr=+no-rvc-hints (PR #145138)

[Craig Topper via llvm-commits]

topperc wrote:

> I think we should remove this. I think it comes partly from the presentation of RVC hint instructions being rather different than the 32-bit hints in the ISA manual: Take the example of 32-bit LUI, this is described straightforwardly as having a 5-bit `rd` and 20-bit immediate. The table of hints then explains that `lui` with rd=x0 can be used as a hint. Contrast with `c.lui` - this is defined as having an `rd` field that isn't x0 or x2. e.g. `c.lui zero, 1` isn't a `c.lui` instruction while `lui zero, 1` is an lui instruction.
> 

There have been recent changes to how those descriptions are written. Here is the current text for c.lui

"C.LUI loads the non-zero 6-bit immediate field into bits 17–12 of the destination register, clears the
bottom 12 bits, and sign-extends bit 17 into all higher bits of the destination. C.LUI expands into lui
rd, imm. C.LUI is valid only when rd≠x2, and when the immediate is not equal to zero. The code points
with imm=0 are reserved. The code points with rd=x2 and imm≠0 correspond to the C.ADDI16SP
instruction. The code points with rd=x0 and imm≠0 are HINTs."


https://github.com/llvm/llvm-project/pull/145138