[llvm] [VectorCombine] New folding pattern for extract/binop/shuffle chains (PR #145232)
Rajveer Singh Bharadwaj via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 24 05:04:37 PDT 2025
https://github.com/Rajveer100 updated https://github.com/llvm/llvm-project/pull/145232
>From b184ba553008a4b5ce9dbc851d0fb5898f2ede21 Mon Sep 17 00:00:00 2001
From: Rajveer <rajveer.developer at icloud.com>
Date: Sun, 22 Jun 2025 17:39:34 +0530
Subject: [PATCH] [VectorCombine] New folding pattern for extract/binop/shuffle
chains
Resolves #144654
Part of #143088
This adds a new `foldShuffleChainsToReduce` for horizontal reduction of
patterns like:
```llvm
define i16 @test_reduce_v8i16(<8 x i16> %a0) local_unnamed_addr #0 {
%1 = shufflevector <8 x i16> %a0, <8 x i16> poison, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 poison, i32 poison, i32 poison, i32 poison>
%2 = tail call <8 x i16> @llvm.umin.v8i16(<8 x i16> %a0, <8 x i16> %1)
%3 = shufflevector <8 x i16> %2, <8 x i16> poison, <8 x i32> <i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
%4 = tail call <8 x i16> @llvm.umin.v8i16(<8 x i16> %2, <8 x i16> %3)
%5 = shufflevector <8 x i16> %4, <8 x i16> poison, <8 x i32> <i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
%6 = tail call <8 x i16> @llvm.umin.v8i16(<8 x i16> %4, <8 x i16> %5)
%7 = extractelement <8 x i16> %6, i64 0
ret i16 %7
}
```
...which can be reduced to a llvm.vector.reduce.umin.v8i16(%a0) intrinsic call.
Similar transformation for other ops when costs permit to do so.
---
.../Transforms/Vectorize/VectorCombine.cpp | 169 ++++++++++++++++++
.../fold-shuffle-chains-to-reduce.ll | 18 ++
2 files changed, 187 insertions(+)
create mode 100644 llvm/test/Transforms/VectorCombine/fold-shuffle-chains-to-reduce.ll
diff --git a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
index 52cb1dbb33b86..127090c1d4d13 100644
--- a/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+++ b/llvm/lib/Transforms/Vectorize/VectorCombine.cpp
@@ -129,6 +129,7 @@ class VectorCombine {
bool foldShuffleOfIntrinsics(Instruction &I);
bool foldShuffleToIdentity(Instruction &I);
bool foldShuffleFromReductions(Instruction &I);
+ bool foldShuffleChainsToReduce(Instruction &I);
bool foldCastFromReductions(Instruction &I);
bool foldSelectShuffle(Instruction &I, bool FromReduction = false);
bool foldInterleaveIntrinsics(Instruction &I);
@@ -2910,6 +2911,171 @@ bool VectorCombine::foldShuffleFromReductions(Instruction &I) {
return foldSelectShuffle(*Shuffle, true);
}
+bool VectorCombine::foldShuffleChainsToReduce(Instruction &I) {
+ auto *EEI = dyn_cast<ExtractElementInst>(&I);
+ if (!EEI)
+ return false;
+
+ std::queue<Value *> InstWorklist;
+ Value *InitEEV = nullptr;
+ Intrinsic::ID CommonOp = 0;
+
+ bool IsFirstEEInst = true, IsFirstCallInst = true;
+ bool ShouldBeCallInst = true;
+
+ SmallVector<Value *, 3> PrevVecV(3, nullptr);
+ int64_t ShuffleMaskHalf = -1, ExpectedShuffleMaskHalf = 1;
+ int64_t VecSize = -1;
+
+ InstWorklist.push(EEI);
+
+ while (!InstWorklist.empty()) {
+ Value *V = InstWorklist.front();
+ InstWorklist.pop();
+
+ auto *CI = dyn_cast<Instruction>(V);
+ if (!CI)
+ return false;
+
+ if (auto *EEInst = dyn_cast<ExtractElementInst>(CI)) {
+ if (!IsFirstEEInst)
+ return false;
+ IsFirstEEInst = false;
+
+ auto *VecOp = EEInst->getVectorOperand();
+ if (!VecOp)
+ return false;
+
+ auto *FVT = dyn_cast<FixedVectorType>(VecOp->getType());
+ if (!FVT)
+ return false;
+
+ VecSize = FVT->getNumElements();
+ if (VecSize < 2 || VecSize % 2 != 0)
+ return false;
+
+ auto *IndexOp = EEInst->getIndexOperand();
+ if (!IndexOp)
+ return false;
+
+ auto *ConstIndex = dyn_cast<ConstantInt>(IndexOp);
+ if (ConstIndex->getValue() != 0)
+ return false;
+
+ ShuffleMaskHalf = 1;
+ PrevVecV[2] = VecOp;
+ InitEEV = EEInst;
+ InstWorklist.push(PrevVecV[2]);
+ } else if (auto *CallI = dyn_cast<CallInst>(CI)) {
+ if (IsFirstEEInst || !ShouldBeCallInst || !PrevVecV[2])
+ return false;
+
+ if (!IsFirstCallInst &&
+ any_of(PrevVecV, [](Value *VecV) { return VecV == nullptr; }))
+ return false;
+
+ if (CallI != (IsFirstCallInst ? PrevVecV[2] : PrevVecV[0]))
+ return false;
+ IsFirstCallInst = false;
+
+ auto *II = dyn_cast<IntrinsicInst>(CallI);
+ if (!II)
+ return false;
+
+ if (!CommonOp)
+ CommonOp = II->getIntrinsicID();
+ if (II->getIntrinsicID() != CommonOp)
+ return false;
+
+ switch (II->getIntrinsicID()) {
+ case Intrinsic::umin:
+ case Intrinsic::umax:
+ case Intrinsic::smin:
+ case Intrinsic::smax: {
+ auto *Op0 = CallI->getOperand(0);
+ auto *Op1 = CallI->getOperand(1);
+ PrevVecV[0] = Op0;
+ PrevVecV[1] = Op1;
+ break;
+ }
+ default:
+ return false;
+ }
+ ShouldBeCallInst ^= 1;
+
+ if (!isa<ShuffleVectorInst>(PrevVecV[1]))
+ std::swap(PrevVecV[0], PrevVecV[1]);
+ InstWorklist.push(PrevVecV[1]);
+ InstWorklist.push(PrevVecV[0]);
+ } else if (auto *SVInst = dyn_cast<ShuffleVectorInst>(CI)) {
+ if (IsFirstEEInst || ShouldBeCallInst ||
+ any_of(PrevVecV, [](Value *VecV) { return VecV == nullptr; }))
+ return false;
+
+ if (SVInst != PrevVecV[1])
+ return false;
+
+ auto *ShuffleVec = SVInst->getOperand(0);
+ if (!ShuffleVec || ShuffleVec != PrevVecV[0])
+ return false;
+
+ SmallVector<int> CurMask;
+ SVInst->getShuffleMask(CurMask);
+
+ if (ShuffleMaskHalf != ExpectedShuffleMaskHalf)
+ return false;
+ ExpectedShuffleMaskHalf *= 2;
+
+ for (int Mask = 0, MaskSize = CurMask.size(); Mask != MaskSize; ++Mask) {
+ if (Mask < ShuffleMaskHalf && CurMask[Mask] != ShuffleMaskHalf + Mask)
+ return false;
+ if (Mask >= ShuffleMaskHalf && CurMask[Mask] != -1)
+ return false;
+ }
+ ShuffleMaskHalf *= 2;
+ if (ExpectedShuffleMaskHalf == VecSize)
+ break;
+ ShouldBeCallInst ^= 1;
+ } else {
+ return false;
+ }
+ }
+
+ if (IsFirstEEInst || ShouldBeCallInst)
+ return false;
+
+ assert(VecSize != -1 && ExpectedShuffleMaskHalf == VecSize &&
+ "Expected Match for Vector Size and Mask Half");
+
+ Value *FinalVecV = PrevVecV[0];
+ if (!InitEEV || !FinalVecV)
+ return false;
+
+ Intrinsic::ID ReducedOp = 0;
+ switch (CommonOp) {
+ case Intrinsic::umin:
+ ReducedOp = Intrinsic::vector_reduce_umin;
+ break;
+ case Intrinsic::umax:
+ ReducedOp = Intrinsic::vector_reduce_umax;
+ break;
+ case Intrinsic::smin:
+ ReducedOp = Intrinsic::vector_reduce_smin;
+ break;
+ case Intrinsic::smax:
+ ReducedOp = Intrinsic::vector_reduce_smax;
+ break;
+ default:
+ return false;
+ }
+
+ auto *ReducedResult =
+ Builder.CreateIntrinsic(ReducedOp, {FinalVecV->getType()}, {FinalVecV});
+ replaceValue(*InitEEV, *ReducedResult);
+
+ return true;
+}
+
/// Determine if its more efficient to fold:
/// reduce(trunc(x)) -> trunc(reduce(x)).
/// reduce(sext(x)) -> sext(reduce(x)).
@@ -3621,6 +3787,9 @@ bool VectorCombine::run() {
MadeChange |= foldShuffleFromReductions(I);
MadeChange |= foldCastFromReductions(I);
break;
+ case Instruction::ExtractElement:
+ MadeChange |= foldShuffleChainsToReduce(I);
+ break;
case Instruction::ICmp:
case Instruction::FCmp:
MadeChange |= foldExtractExtract(I);
diff --git a/llvm/test/Transforms/VectorCombine/fold-shuffle-chains-to-reduce.ll b/llvm/test/Transforms/VectorCombine/fold-shuffle-chains-to-reduce.ll
new file mode 100644
index 0000000000000..6f21eb5097fde
--- /dev/null
+++ b/llvm/test/Transforms/VectorCombine/fold-shuffle-chains-to-reduce.ll
@@ -0,0 +1,18 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt < %s -passes=vector-combine -S | FileCheck %s
+
+define i16 @test_reduce_v8i16(<8 x i16> %a0) local_unnamed_addr #0 {
+; CHECK-LABEL: define i16 @test_reduce_v8i16(
+; CHECK-SAME: <8 x i16> [[A0:%.*]]) local_unnamed_addr {
+; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.vector.reduce.umin.v8i16(<8 x i16> [[A0]])
+; CHECK-NEXT: ret i16 [[TMP1]]
+;
+ %1 = shufflevector <8 x i16> %a0, <8 x i16> poison, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 poison, i32 poison, i32 poison, i32 poison>
+ %2 = tail call <8 x i16> @llvm.umin.v8i16(<8 x i16> %a0, <8 x i16> %1)
+ %3 = shufflevector <8 x i16> %2, <8 x i16> poison, <8 x i32> <i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %4 = tail call <8 x i16> @llvm.umin.v8i16(<8 x i16> %2, <8 x i16> %3)
+ %5 = shufflevector <8 x i16> %4, <8 x i16> poison, <8 x i32> <i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+ %6 = tail call <8 x i16> @llvm.umin.v8i16(<8 x i16> %4, <8 x i16> %5)
+ %7 = extractelement <8 x i16> %6, i64 0
+ ret i16 %7
+}
More information about the llvm-commits
mailing list