[llvm] [LV][VPlan] When the load/store stride is -1, use vle/vse instead of vlse/vsse (PR #130032)

[Mel Chen via llvm-commits]

Mel-Chen wrote:

> no，My idea is that when stride is -1, I set the Offset value to (1-EVL), so that the instructions used in the final translation to the assembly level are VLE/VSE instead of VLSE/VSSE. But I'm not sure if this will be a problem, do you have any ideas?

I don’t think this works as intended. Have you verified the correctness of the TSVC results?

Take reverse load as an example. Suppose VF = 4 and we want to load starting from index n. The expected index vector should be [n, n-1, n-2, n-3].

However, if EVL = get.vector.length(TripCount) = 4, this patch will compute the starting index as n-3, and then perform a consecutive load of 4 elements — that is, it loads from [n-3, n-2, n-1, n].

This is not the same as the original reverse load pattern, which requires [n, n-1, n-2, n-3].

https://github.com/llvm/llvm-project/pull/130032