[llvm] [SelectionDAG] Optimize MPI for align(1) GEPs using base pointer (PR #145309)

[Acthinks Yang via llvm-commits]

================
@@ -4597,7 +4598,25 @@ void SelectionDAGBuilder::visitLoad(const LoadInst &I) {
   const MDNode *Ranges = getRangeMetadata(I);
   bool isVolatile = I.isVolatile();
   MachineMemOperand::Flags MMOFlags =
-      TLI.getLoadMemOperandFlags(I, DAG.getDataLayout(), AC, LibInfo);
+      TLI.getLoadMemOperandFlags(I, DL, AC, LibInfo);
+
+  // See visitStore comments.
+  int64_t Offset = 0;
+  if (auto *GEP = dyn_cast<GetElementPtrInst>(SV);
+      GEP && Alignment == Align(1)) {
----------------
Acthinks wrote:

> Align of 1 shouldn't be special. 

Yes, it is possible to do so without special treatment. This is currently done because it is uncommon to miss optimizations in other scenarios.

> But isn't this already refined in the middle end? We shouldn't need to redo this analysis during codegen. 
   
The middle end has given the best alignment information for load/store. Getting the basePtr align information may provide better optimization opportunities in expandUnalignedLoad/Store.

> Given the test changes, we probably didn't bother to refine the alignment of kernel argument loads or something

demo:
```
define void @store_const_with_align_attribute(ptr align 2 %p) {
entry:
  %len = getelementptr inbounds nuw i8, ptr %p, i32 3
  store i32 0, ptr %len, align 1
  ret void
}
```
old:
```
sb zero, 3(a0)
**sb zero, 4(a0)
sb zero, 5(a0)**
sb zero, 6(a0)
ret
```
new:
```
sb zero, 3(a0)
**sh zero, 4(a0)**
sb zero, 6(a0)
ret
```


https://github.com/llvm/llvm-project/pull/145309