[llvm] 0fcced7 - [RISCV][NFC] Zce always implies/requires Zca (#145442)

[via llvm-commits]

Author: Sam Elliott
Date: 2025-06-23T20:09:23-07:00
New Revision: 0fcced7d791f5be3f5f9fa6e561854716b11d4e8

URL: https://github.com/llvm/llvm-project/commit/0fcced7d791f5be3f5f9fa6e561854716b11d4e8
DIFF: https://github.com/llvm/llvm-project/commit/0fcced7d791f5be3f5f9fa6e561854716b11d4e8.diff

LOG: [RISCV][NFC] Zce always implies/requires Zca (#145442)

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVFeatures.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index e2204eba4c23f..36b3aff51cda9 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -455,7 +455,8 @@ def HasStdExtZcmt : Predicate<"Subtarget->hasStdExtZcmt()">,
 def FeatureStdExtZce
     : RISCVExtension<1, 0,
                      "Compressed extensions for microcontrollers",
-                     [FeatureStdExtZcb, FeatureStdExtZcmp, FeatureStdExtZcmt]>;
+                     [FeatureStdExtZca, FeatureStdExtZcb, FeatureStdExtZcmp,
+                      FeatureStdExtZcmt]>;
 
 def HasStdExtCOrZcfOrZce
     : Predicate<"Subtarget->hasStdExtC() || Subtarget->hasStdExtZcf() ||"