[llvm] [DAGCombiner][RISCV] Don't propagate the exact flag from udiv/sdiv to urem/srem. (PR #145387)

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 23 12:14:09 PDT 2025


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@@ -4961,11 +4961,15 @@ SDValue DAGCombiner::visitSDIV(SDNode *N) {
     // (Dividend - (Quotient * Divisor).
     if (SDNode *RemNode = DAG.getNodeIfExists(ISD::SREM, N->getVTList(),
                                               { N0, N1 })) {
-      SDValue Mul = DAG.getNode(ISD::MUL, DL, VT, V, N1);
-      SDValue Sub = DAG.getNode(ISD::SUB, DL, VT, N0, Mul);
-      AddToWorklist(Mul.getNode());
-      AddToWorklist(Sub.getNode());
-      CombineTo(RemNode, Sub);
+      // If the udiv has the exact flag we shouldn't propagate it to the
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RKSimon wrote:

sdiv?

https://github.com/llvm/llvm-project/pull/145387


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