[llvm] [AMDGPU][SDAG] Legalise v2i32 or/xor/and instructions to make use of 64-bit wide instructions (PR #140694)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 23 07:40:15 PDT 2025


================
@@ -13062,13 +13127,39 @@ SDValue SITargetLowering::performXorCombine(SDNode *N,
   if (SDValue RV = reassociateScalarOps(N, DCI.DAG))
     return RV;
 
+  SelectionDAG &DAG = DCI.DAG;
+  EVT VT = N->getValueType(0);
   SDValue LHS = N->getOperand(0);
   SDValue RHS = N->getOperand(1);
 
+  if (VT == MVT::v2i32 && LHS.getNumOperands() > 1) {
----------------
arsenm wrote:

Add DAG comment explaining what this is doing. We probably should directly handle xor-as-fneg in selection of select 

https://github.com/llvm/llvm-project/pull/140694


More information about the llvm-commits mailing list