[llvm] f3021e7 - ARM: Rename ARMMCExpr::VK_ to ARM::S_
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 15 23:29:12 PDT 2025
Author: Fangrui Song
Date: 2025-06-15T23:29:07-07:00
New Revision: f3021e79fd5a4cab5537f37df2e6010a325d0a7c
URL: https://github.com/llvm/llvm-project/commit/f3021e79fd5a4cab5537f37df2e6010a325d0a7c
DIFF: https://github.com/llvm/llvm-project/commit/f3021e79fd5a4cab5537f37df2e6010a325d0a7c.diff
LOG: ARM: Rename ARMMCExpr::VK_ to ARM::S_
Prepare for removing ARMMCExpr. Adopt the new naming convention (S_
instead of VK_; the relocation specifier was previously named
`VariantKind`)) used by most other targets.
Make ARMMCAsmInfo.h include ARMMCExpr.h and change .cpp files to include
ARMMCAsmInfo.h. We will eventually remove ARMMCExpr.h.
Added:
Modified:
llvm/lib/Target/ARM/ARMAsmPrinter.cpp
llvm/lib/Target/ARM/ARMMCInstLower.cpp
llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
index 13efd70c0f22b..fef7a17ae0b63 100644
--- a/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
+++ b/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
@@ -18,7 +18,7 @@
#include "ARMTargetMachine.h"
#include "ARMTargetObjectFile.h"
#include "MCTargetDesc/ARMInstPrinter.h"
-#include "MCTargetDesc/ARMMCExpr.h"
+#include "MCTargetDesc/ARMMCAsmInfo.h"
#include "TargetInfo/ARMTargetInfo.h"
#include "llvm/ADT/SmallString.h"
#include "llvm/BinaryFormat/COFF.h"
@@ -92,8 +92,7 @@ void ARMAsmPrinter::emitXXStructor(const DataLayout &DL, const Constant *CV) {
const MCExpr *E = MCSymbolRefExpr::create(
GetARMGVSymbol(GV, ARMII::MO_NO_FLAG),
- (Subtarget->isTargetELF() ? ARMMCExpr::VK_TARGET1 : ARMMCExpr::VK_None),
- OutContext);
+ (Subtarget->isTargetELF() ? ARM::S_TARGET1 : ARM::S_None), OutContext);
OutStreamer->emitValue(E, Size);
}
@@ -843,17 +842,17 @@ static MCSymbol *getPICLabel(StringRef Prefix, unsigned FunctionNumber,
static uint8_t getModifierSpecifier(ARMCP::ARMCPModifier Modifier) {
switch (Modifier) {
case ARMCP::no_modifier:
- return ARMMCExpr::VK_None;
+ return ARM::S_None;
case ARMCP::TLSGD:
- return ARMMCExpr::VK_TLSGD;
+ return ARM::S_TLSGD;
case ARMCP::TPOFF:
- return ARMMCExpr::VK_TPOFF;
+ return ARM::S_TPOFF;
case ARMCP::GOTTPOFF:
- return ARMMCExpr::VK_GOTTPOFF;
+ return ARM::S_GOTTPOFF;
case ARMCP::SBREL:
- return ARMMCExpr::VK_SBREL;
+ return ARM::S_SBREL;
case ARMCP::GOT_PREL:
- return ARMMCExpr::VK_GOT_PREL;
+ return ARM::S_GOT_PREL;
case ARMCP::SECREL:
return MCSymbolRefExpr::VK_SECREL;
}
diff --git a/llvm/lib/Target/ARM/ARMMCInstLower.cpp b/llvm/lib/Target/ARM/ARMMCInstLower.cpp
index 6892db6eb52c4..b32de6b66058b 100644
--- a/llvm/lib/Target/ARM/ARMMCInstLower.cpp
+++ b/llvm/lib/Target/ARM/ARMMCInstLower.cpp
@@ -18,7 +18,7 @@
#include "ARMSubtarget.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMBaseInfo.h"
-#include "MCTargetDesc/ARMMCExpr.h"
+#include "MCTargetDesc/ARMMCAsmInfo.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineInstr.h"
@@ -37,9 +37,9 @@ using namespace llvm;
MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
const MCSymbol *Symbol) {
- auto Specifier = ARMMCExpr::VK_None;
+ auto Specifier = ARM::S_None;
if (MO.getTargetFlags() & ARMII::MO_SBREL)
- Specifier = ARMMCExpr::VK_SBREL;
+ Specifier = ARM::S_SBREL;
const MCExpr *Expr = MCSymbolRefExpr::create(Symbol, Specifier, OutContext);
switch (MO.getTargetFlags() & ARMII::MO_OPTION_MASK) {
diff --git a/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp b/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
index 131703ec082bf..a0a400f938482 100644
--- a/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
@@ -9,7 +9,7 @@
#include "ARMTargetObjectFile.h"
#include "ARMSubtarget.h"
#include "ARMTargetMachine.h"
-#include "MCTargetDesc/ARMMCExpr.h"
+#include "MCTargetDesc/ARMMCAsmInfo.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/MC/MCAsmInfo.h"
@@ -30,7 +30,7 @@ using namespace dwarf;
//===----------------------------------------------------------------------===//
ARMElfTargetObjectFile::ARMElfTargetObjectFile() {
- PLTRelativeSpecifier = ARMMCExpr::VK_PREL31;
+ PLTRelativeSpecifier = ARM::S_PREL31;
SupportIndirectSymViaGOTPCRel = true;
}
@@ -68,14 +68,14 @@ const MCExpr *ARMElfTargetObjectFile::getIndirectSymViaGOTPCRel(
int64_t Offset, MachineModuleInfo *MMI, MCStreamer &Streamer) const {
int64_t FinalOffset = Offset + MV.getConstant();
const MCExpr *Res =
- MCSymbolRefExpr::create(Sym, ARMMCExpr::VK_GOT_PREL, getContext());
+ MCSymbolRefExpr::create(Sym, ARM::S_GOT_PREL, getContext());
const MCExpr *Off = MCConstantExpr::create(FinalOffset, getContext());
return MCBinaryExpr::createAdd(Res, Off, getContext());
}
const MCExpr *ARMElfTargetObjectFile::
getIndirectSymViaRWPI(const MCSymbol *Sym) const {
- return MCSymbolRefExpr::create(Sym, ARMMCExpr::VK_SBREL, getContext());
+ return MCSymbolRefExpr::create(Sym, ARM::S_SBREL, getContext());
}
const MCExpr *ARMElfTargetObjectFile::getTTypeGlobalReference(
@@ -87,13 +87,13 @@ const MCExpr *ARMElfTargetObjectFile::getTTypeGlobalReference(
assert(Encoding == DW_EH_PE_absptr && "Can handle absptr encoding only");
- return MCSymbolRefExpr::create(TM.getSymbol(GV), ARMMCExpr::VK_TARGET2,
+ return MCSymbolRefExpr::create(TM.getSymbol(GV), ARM::S_TARGET2,
getContext());
}
const MCExpr *ARMElfTargetObjectFile::
getDebugThreadLocalSymbol(const MCSymbol *Sym) const {
- return MCSymbolRefExpr::create(Sym, ARMMCExpr::VK_TLSLDO, getContext());
+ return MCSymbolRefExpr::create(Sym, ARM::S_TLSLDO, getContext());
}
static bool isExecuteOnlyFunction(const GlobalObject *GO, SectionKind SK,
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 19c417b2c6e9b..6e9efe40dc54c 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -11,7 +11,7 @@
#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMBaseInfo.h"
#include "MCTargetDesc/ARMInstPrinter.h"
-#include "MCTargetDesc/ARMMCExpr.h"
+#include "MCTargetDesc/ARMMCAsmInfo.h"
#include "MCTargetDesc/ARMMCTargetDesc.h"
#include "TargetInfo/ARMTargetInfo.h"
#include "Utils/ARMBaseInfo.h"
@@ -1327,8 +1327,8 @@ class ARMOperand : public MCParsedAsmOperand {
// We want to avoid matching :upper16: and :lower16: as we want these
// expressions to match in isImm0_65535Expr()
const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(getImm());
- return (!ARM16Expr || (ARM16Expr->getSpecifier() != ARMMCExpr::VK_HI16 &&
- ARM16Expr->getSpecifier() != ARMMCExpr::VK_LO16));
+ return (!ARM16Expr || (ARM16Expr->getSpecifier() != ARM::S_HI16 &&
+ ARM16Expr->getSpecifier() != ARM::S_LO16));
}
if (!isImm()) return false;
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
@@ -6473,7 +6473,7 @@ bool ARMAsmParser::parseImmExpr(int64_t &Out) {
// :upper8_15:, :upper0_7:, :lower8_15: and :lower0_7:
bool ARMAsmParser::parsePrefix(ARMMCExpr::Specifier &Spec) {
MCAsmParser &Parser = getParser();
- Spec = ARMMCExpr::VK_None;
+ Spec = ARM::S_None;
// consume an optional '#' (GNU compatibility)
if (getLexer().is(AsmToken::Hash))
@@ -6498,12 +6498,12 @@ bool ARMAsmParser::parsePrefix(ARMMCExpr::Specifier &Spec) {
ARMMCExpr::Specifier Spec;
uint8_t SupportedFormats;
} PrefixEntries[] = {
- {"upper16", ARMMCExpr::VK_HI16, COFF | ELF | MACHO},
- {"lower16", ARMMCExpr::VK_LO16, COFF | ELF | MACHO},
- {"upper8_15", ARMMCExpr::VK_HI_8_15, ELF},
- {"upper0_7", ARMMCExpr::VK_HI_0_7, ELF},
- {"lower8_15", ARMMCExpr::VK_LO_8_15, ELF},
- {"lower0_7", ARMMCExpr::VK_LO_0_7, ELF},
+ {"upper16", ARM::S_HI16, COFF | ELF | MACHO},
+ {"lower16", ARM::S_LO16, COFF | ELF | MACHO},
+ {"upper8_15", ARM::S_HI_8_15, ELF},
+ {"upper0_7", ARM::S_HI_0_7, ELF},
+ {"lower8_15", ARM::S_LO_8_15, ELF},
+ {"lower0_7", ARM::S_LO_0_7, ELF},
};
StringRef IDVal = Parser.getTok().getIdentifier();
@@ -6880,10 +6880,10 @@ static bool isThumbI8Relocation(MCParsedAsmOperand &MCOp) {
if (!E)
return false;
const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(E);
- if (ARM16Expr && (ARM16Expr->getSpecifier() == ARMMCExpr::VK_HI_8_15 ||
- ARM16Expr->getSpecifier() == ARMMCExpr::VK_HI_0_7 ||
- ARM16Expr->getSpecifier() == ARMMCExpr::VK_LO_8_15 ||
- ARM16Expr->getSpecifier() == ARMMCExpr::VK_LO_0_7))
+ if (ARM16Expr && (ARM16Expr->getSpecifier() == ARM::S_HI_8_15 ||
+ ARM16Expr->getSpecifier() == ARM::S_HI_0_7 ||
+ ARM16Expr->getSpecifier() == ARM::S_LO_8_15 ||
+ ARM16Expr->getSpecifier() == ARM::S_LO_0_7))
return true;
return false;
}
@@ -8287,8 +8287,8 @@ bool ARMAsmParser::validateInstruction(MCInst &Inst,
const MCExpr *E = dyn_cast<MCExpr>(Op.getImm());
if (!E) break;
const ARMMCExpr *ARM16Expr = dyn_cast<ARMMCExpr>(E);
- if (!ARM16Expr || (ARM16Expr->getSpecifier() != ARMMCExpr::VK_HI16 &&
- ARM16Expr->getSpecifier() != ARMMCExpr::VK_LO16))
+ if (!ARM16Expr || (ARM16Expr->getSpecifier() != ARM::S_HI16 &&
+ ARM16Expr->getSpecifier() != ARM::S_LO16))
return Error(
Op.getStartLoc(),
"immediate expression for mov requires :lower16: or :upper16");
@@ -12437,7 +12437,7 @@ bool ARMAsmParser::parseDirectiveTLSDescSeq(SMLoc L) {
auto *Sym = getContext().getOrCreateSymbol(Parser.getTok().getIdentifier());
const auto *SRE =
- MCSymbolRefExpr::create(Sym, ARMMCExpr::VK_TLSDESCSEQ, getContext());
+ MCSymbolRefExpr::create(Sym, ARM::S_TLSDESCSEQ, getContext());
Lex();
if (parseEOL())
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index a7320eea80b0e..f43fdae554b8b 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -12,7 +12,7 @@
#include "MCTargetDesc/ARMAsmBackendELF.h"
#include "MCTargetDesc/ARMAsmBackendWinCOFF.h"
#include "MCTargetDesc/ARMFixupKinds.h"
-#include "MCTargetDesc/ARMMCExpr.h"
+#include "MCTargetDesc/ARMMCAsmInfo.h"
#include "MCTargetDesc/ARMMCTargetDesc.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/BinaryFormat/ELF.h"
@@ -619,7 +619,7 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,
// Offset by 8 just as above.
if (const MCSymbolRefExpr *SRE =
dyn_cast<MCSymbolRefExpr>(Fixup.getValue()))
- if (SRE->getSpecifier() == ARMMCExpr::VK_TLSCALL)
+ if (SRE->getSpecifier() == ARM::S_TLSCALL)
return 0;
return 0xffffff & (Value >> 2);
case ARM::fixup_t2_uncondbranch: {
@@ -746,7 +746,7 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,
uint32_t offset = (Value - 4) >> 2;
if (const MCSymbolRefExpr *SRE =
dyn_cast<MCSymbolRefExpr>(Fixup.getValue()))
- if (SRE->getSpecifier() == ARMMCExpr::VK_TLSCALL)
+ if (SRE->getSpecifier() == ARM::S_TLSCALL)
offset = 0;
uint32_t signBit = (offset & 0x400000) >> 22;
uint32_t I1Bit = (offset & 0x200000) >> 21;
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
index f5a6ee5c5a2e5..b0ebb74424c78 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
@@ -7,7 +7,7 @@
//===----------------------------------------------------------------------===//
#include "MCTargetDesc/ARMFixupKinds.h"
-#include "MCTargetDesc/ARMMCExpr.h"
+#include "MCTargetDesc/ARMMCAsmInfo.h"
#include "MCTargetDesc/ARMMCTargetDesc.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/MC/MCAssembler.h"
@@ -87,16 +87,16 @@ unsigned ARMELFObjectWriter::getRelocType(const MCFixup &Fixup,
};
switch (Specifier) {
- case ARMMCExpr::VK_GOTTPOFF:
- case ARMMCExpr::VK_GOTTPOFF_FDPIC:
- case ARMMCExpr::VK_TLSCALL:
- case ARMMCExpr::VK_TLSDESC:
- case ARMMCExpr::VK_TLSGD:
- case ARMMCExpr::VK_TLSGD_FDPIC:
- case ARMMCExpr::VK_TLSLDM:
- case ARMMCExpr::VK_TLSLDM_FDPIC:
- case ARMMCExpr::VK_TLSLDO:
- case ARMMCExpr::VK_TPOFF:
+ case ARM::S_GOTTPOFF:
+ case ARM::S_GOTTPOFF_FDPIC:
+ case ARM::S_TLSCALL:
+ case ARM::S_TLSDESC:
+ case ARM::S_TLSGD:
+ case ARM::S_TLSGD_FDPIC:
+ case ARM::S_TLSLDM:
+ case ARM::S_TLSLDM_FDPIC:
+ case ARM::S_TLSLDO:
+ case ARM::S_TPOFF:
if (auto *SA = Target.getAddSym())
cast<MCSymbolELF>(SA)->setType(ELF::STT_TLS);
break;
@@ -115,7 +115,7 @@ unsigned ARMELFObjectWriter::getRelocType(const MCFixup &Fixup,
reportError(Fixup.getLoc(),
"invalid fixup for 4-byte pc-relative data relocation");
return ELF::R_ARM_NONE;
- case ARMMCExpr::VK_None: {
+ case ARM::S_None: {
if (const auto *SA = Target.getAddSym()) {
// For GNU AS compatibility expressions such as
// _GLOBAL_OFFSET_TABLE_ - label emit a R_ARM_BASE_PREL relocation.
@@ -124,19 +124,19 @@ unsigned ARMELFObjectWriter::getRelocType(const MCFixup &Fixup,
}
return ELF::R_ARM_REL32;
}
- case ARMMCExpr::VK_GOTTPOFF:
+ case ARM::S_GOTTPOFF:
return ELF::R_ARM_TLS_IE32;
- case ARMMCExpr::VK_GOT_PREL:
+ case ARM::S_GOT_PREL:
return ELF::R_ARM_GOT_PREL;
- case ARMMCExpr::VK_PREL31:
+ case ARM::S_PREL31:
return ELF::R_ARM_PREL31;
}
case ARM::fixup_arm_blx:
case ARM::fixup_arm_uncondbl:
switch (Specifier) {
- case ARMMCExpr::VK_PLT:
+ case ARM::S_PLT:
return ELF::R_ARM_CALL;
- case ARMMCExpr::VK_TLSCALL:
+ case ARM::S_TLSCALL:
return ELF::R_ARM_TLS_CALL;
default:
return ELF::R_ARM_CALL;
@@ -172,7 +172,7 @@ unsigned ARMELFObjectWriter::getRelocType(const MCFixup &Fixup,
case ARM::fixup_arm_thumb_bl:
case ARM::fixup_arm_thumb_blx:
switch (Specifier) {
- case ARMMCExpr::VK_TLSCALL:
+ case ARM::S_TLSCALL:
return ELF::R_ARM_THM_TLS_CALL;
default:
return ELF::R_ARM_THM_CALL;
@@ -206,7 +206,7 @@ unsigned ARMELFObjectWriter::getRelocType(const MCFixup &Fixup,
default:
reportError(Fixup.getLoc(), "invalid fixup for 1-byte data relocation");
return ELF::R_ARM_NONE;
- case ARMMCExpr::VK_None:
+ case ARM::S_None:
return ELF::R_ARM_ABS8;
}
case FK_Data_2:
@@ -214,7 +214,7 @@ unsigned ARMELFObjectWriter::getRelocType(const MCFixup &Fixup,
default:
reportError(Fixup.getLoc(), "invalid fixup for 2-byte data relocation");
return ELF::R_ARM_NONE;
- case ARMMCExpr::VK_None:
+ case ARM::S_None:
return ELF::R_ARM_ABS16;
}
case FK_Data_4:
@@ -222,51 +222,51 @@ unsigned ARMELFObjectWriter::getRelocType(const MCFixup &Fixup,
default:
reportError(Fixup.getLoc(), "invalid fixup for 4-byte data relocation");
return ELF::R_ARM_NONE;
- case ARMMCExpr::VK_ARM_NONE:
+ case ARM::S_ARM_NONE:
return ELF::R_ARM_NONE;
- case ARMMCExpr::VK_GOT:
+ case ARM::S_GOT:
return ELF::R_ARM_GOT_BREL;
- case ARMMCExpr::VK_TLSGD:
+ case ARM::S_TLSGD:
return ELF::R_ARM_TLS_GD32;
- case ARMMCExpr::VK_TPOFF:
+ case ARM::S_TPOFF:
return ELF::R_ARM_TLS_LE32;
- case ARMMCExpr::VK_GOTTPOFF:
+ case ARM::S_GOTTPOFF:
return ELF::R_ARM_TLS_IE32;
- case ARMMCExpr::VK_None:
+ case ARM::S_None:
return ELF::R_ARM_ABS32;
- case ARMMCExpr::VK_GOTOFF:
+ case ARM::S_GOTOFF:
return ELF::R_ARM_GOTOFF32;
- case ARMMCExpr::VK_GOT_PREL:
+ case ARM::S_GOT_PREL:
return ELF::R_ARM_GOT_PREL;
- case ARMMCExpr::VK_TARGET1:
+ case ARM::S_TARGET1:
return ELF::R_ARM_TARGET1;
- case ARMMCExpr::VK_TARGET2:
+ case ARM::S_TARGET2:
return ELF::R_ARM_TARGET2;
- case ARMMCExpr::VK_PREL31:
+ case ARM::S_PREL31:
return ELF::R_ARM_PREL31;
- case ARMMCExpr::VK_SBREL:
+ case ARM::S_SBREL:
return ELF::R_ARM_SBREL32;
- case ARMMCExpr::VK_TLSLDO:
+ case ARM::S_TLSLDO:
return ELF::R_ARM_TLS_LDO32;
- case ARMMCExpr::VK_TLSCALL:
+ case ARM::S_TLSCALL:
return ELF::R_ARM_TLS_CALL;
- case ARMMCExpr::VK_TLSDESC:
+ case ARM::S_TLSDESC:
return ELF::R_ARM_TLS_GOTDESC;
- case ARMMCExpr::VK_TLSLDM:
+ case ARM::S_TLSLDM:
return ELF::R_ARM_TLS_LDM32;
- case ARMMCExpr::VK_TLSDESCSEQ:
+ case ARM::S_TLSDESCSEQ:
return ELF::R_ARM_TLS_DESCSEQ;
- case ARMMCExpr::VK_FUNCDESC:
+ case ARM::S_FUNCDESC:
return CheckFDPIC(ELF::R_ARM_FUNCDESC);
- case ARMMCExpr::VK_GOTFUNCDESC:
+ case ARM::S_GOTFUNCDESC:
return CheckFDPIC(ELF::R_ARM_GOTFUNCDESC);
- case ARMMCExpr::VK_GOTOFFFUNCDESC:
+ case ARM::S_GOTOFFFUNCDESC:
return CheckFDPIC(ELF::R_ARM_GOTOFFFUNCDESC);
- case ARMMCExpr::VK_TLSGD_FDPIC:
+ case ARM::S_TLSGD_FDPIC:
return CheckFDPIC(ELF::R_ARM_TLS_GD32_FDPIC);
- case ARMMCExpr::VK_TLSLDM_FDPIC:
+ case ARM::S_TLSLDM_FDPIC:
return CheckFDPIC(ELF::R_ARM_TLS_LDM32_FDPIC);
- case ARMMCExpr::VK_GOTTPOFF_FDPIC:
+ case ARM::S_GOTTPOFF_FDPIC:
return CheckFDPIC(ELF::R_ARM_TLS_IE32_FDPIC);
}
case ARM::fixup_arm_condbranch:
@@ -277,9 +277,9 @@ unsigned ARMELFObjectWriter::getRelocType(const MCFixup &Fixup,
default:
reportError(Fixup.getLoc(), "invalid fixup for ARM MOVT instruction");
return ELF::R_ARM_NONE;
- case ARMMCExpr::VK_None:
+ case ARM::S_None:
return ELF::R_ARM_MOVT_ABS;
- case ARMMCExpr::VK_SBREL:
+ case ARM::S_SBREL:
return ELF::R_ARM_MOVT_BREL;
}
case ARM::fixup_arm_movw_lo16:
@@ -287,9 +287,9 @@ unsigned ARMELFObjectWriter::getRelocType(const MCFixup &Fixup,
default:
reportError(Fixup.getLoc(), "invalid fixup for ARM MOVW instruction");
return ELF::R_ARM_NONE;
- case ARMMCExpr::VK_None:
+ case ARM::S_None:
return ELF::R_ARM_MOVW_ABS_NC;
- case ARMMCExpr::VK_SBREL:
+ case ARM::S_SBREL:
return ELF::R_ARM_MOVW_BREL_NC;
}
case ARM::fixup_t2_movt_hi16:
@@ -297,9 +297,9 @@ unsigned ARMELFObjectWriter::getRelocType(const MCFixup &Fixup,
default:
reportError(Fixup.getLoc(), "invalid fixup for Thumb MOVT instruction");
return ELF::R_ARM_NONE;
- case ARMMCExpr::VK_None:
+ case ARM::S_None:
return ELF::R_ARM_THM_MOVT_ABS;
- case ARMMCExpr::VK_SBREL:
+ case ARM::S_SBREL:
return ELF::R_ARM_THM_MOVT_BREL;
}
case ARM::fixup_t2_movw_lo16:
@@ -307,9 +307,9 @@ unsigned ARMELFObjectWriter::getRelocType(const MCFixup &Fixup,
default:
reportError(Fixup.getLoc(), "invalid fixup for Thumb MOVW instruction");
return ELF::R_ARM_NONE;
- case ARMMCExpr::VK_None:
+ case ARM::S_None:
return ELF::R_ARM_THM_MOVW_ABS_NC;
- case ARMMCExpr::VK_SBREL:
+ case ARM::S_SBREL:
return ELF::R_ARM_THM_MOVW_BREL_NC;
}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
index 2b959768d2135..73ad62ed79532 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
@@ -14,7 +14,7 @@
#include "ARMMCTargetDesc.h"
#include "ARMUnwindOpAsm.h"
-#include "MCTargetDesc/ARMMCExpr.h"
+#include "MCTargetDesc/ARMMCAsmInfo.h"
#include "Utils/ARMBaseInfo.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallString.h"
@@ -590,7 +590,7 @@ class ARMELFStreamer : public MCELFStreamer {
/// necessary.
void emitValueImpl(const MCExpr *Value, unsigned Size, SMLoc Loc) override {
if (const MCSymbolRefExpr *SRE = dyn_cast_or_null<MCSymbolRefExpr>(Value)) {
- if (SRE->getSpecifier() == ARMMCExpr::VK_SBREL && !(Size == 4)) {
+ if (SRE->getSpecifier() == ARM::S_SBREL && !(Size == 4)) {
getContext().reportError(Loc, "relocated expression must be 32-bit");
return;
}
@@ -1255,7 +1255,7 @@ void ARMELFStreamer::emitFnEnd() {
EmitPersonalityFixup(GetAEABIUnwindPersonalityName(PersonalityIndex));
const MCSymbolRefExpr *FnStartRef =
- MCSymbolRefExpr::create(FnStart, ARMMCExpr::VK_PREL31, getContext());
+ MCSymbolRefExpr::create(FnStart, ARM::S_PREL31, getContext());
emitValue(FnStartRef, 4);
@@ -1264,7 +1264,7 @@ void ARMELFStreamer::emitFnEnd() {
} else if (ExTab) {
// Emit a reference to the unwind opcodes in the ".ARM.extab" section.
const MCSymbolRefExpr *ExTabEntryRef =
- MCSymbolRefExpr::create(ExTab, ARMMCExpr::VK_PREL31, getContext());
+ MCSymbolRefExpr::create(ExTab, ARM::S_PREL31, getContext());
emitValue(ExTabEntryRef, 4);
} else {
// For the __aeabi_unwind_cpp_pr0, we have to emit the unwind opcodes in
@@ -1294,8 +1294,8 @@ void ARMELFStreamer::emitCantUnwind() { CantUnwind = true; }
void ARMELFStreamer::EmitPersonalityFixup(StringRef Name) {
const MCSymbol *PersonalitySym = getContext().getOrCreateSymbol(Name);
- const MCSymbolRefExpr *PersonalityRef = MCSymbolRefExpr::create(
- PersonalitySym, ARMMCExpr::VK_ARM_NONE, getContext());
+ const MCSymbolRefExpr *PersonalityRef =
+ MCSymbolRefExpr::create(PersonalitySym, ARM::S_ARM_NONE, getContext());
visitUsedExpr(*PersonalityRef);
MCDataFragment *DF = getOrCreateDataFragment();
@@ -1341,7 +1341,7 @@ void ARMELFStreamer::FlushUnwindOpcodes(bool NoHandlerData) {
// Emit personality
if (Personality) {
const MCSymbolRefExpr *PersonalityRef = MCSymbolRefExpr::create(
- Personality, uint16_t(ARMMCExpr::VK_PREL31), getContext());
+ Personality, uint16_t(ARM::S_PREL31), getContext());
emitValue(PersonalityRef, 4);
}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
index 92121dd5704d8..f8ec0237dcb59 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
@@ -18,30 +18,30 @@
using namespace llvm;
const MCAsmInfo::VariantKindDesc variantKindDescs[] = {
- {ARMMCExpr::VK_GOT_PREL, "GOT_PREL"},
- {ARMMCExpr::VK_ARM_NONE, "none"},
- {ARMMCExpr::VK_PREL31, "prel31"},
- {ARMMCExpr::VK_SBREL, "sbrel"},
- {ARMMCExpr::VK_TARGET1, "target1"},
- {ARMMCExpr::VK_TARGET2, "target2"},
- {ARMMCExpr::VK_TLSLDO, "TLSLDO"},
+ {ARM::S_GOT_PREL, "GOT_PREL"},
+ {ARM::S_ARM_NONE, "none"},
+ {ARM::S_PREL31, "prel31"},
+ {ARM::S_SBREL, "sbrel"},
+ {ARM::S_TARGET1, "target1"},
+ {ARM::S_TARGET2, "target2"},
+ {ARM::S_TLSLDO, "TLSLDO"},
{MCSymbolRefExpr::VK_COFF_IMGREL32, "imgrel"},
- {ARMMCExpr::VK_FUNCDESC, "FUNCDESC"},
- {ARMMCExpr::VK_GOT, "GOT"},
- {ARMMCExpr::VK_GOTFUNCDESC, "GOTFUNCDESC"},
- {ARMMCExpr::VK_GOTOFF, "GOTOFF"},
- {ARMMCExpr::VK_GOTOFFFUNCDESC, "GOTOFFFUNCDESC"},
- {ARMMCExpr::VK_GOTTPOFF, "GOTTPOFF"},
- {ARMMCExpr::VK_GOTTPOFF_FDPIC, "gottpoff_fdpic"},
- {ARMMCExpr::VK_PLT, "PLT"},
+ {ARM::S_FUNCDESC, "FUNCDESC"},
+ {ARM::S_GOT, "GOT"},
+ {ARM::S_GOTFUNCDESC, "GOTFUNCDESC"},
+ {ARM::S_GOTOFF, "GOTOFF"},
+ {ARM::S_GOTOFFFUNCDESC, "GOTOFFFUNCDESC"},
+ {ARM::S_GOTTPOFF, "GOTTPOFF"},
+ {ARM::S_GOTTPOFF_FDPIC, "gottpoff_fdpic"},
+ {ARM::S_PLT, "PLT"},
{MCSymbolRefExpr::VK_SECREL, "SECREL32"},
- {ARMMCExpr::VK_TLSCALL, "tlscall"},
- {ARMMCExpr::VK_TLSDESC, "tlsdesc"},
- {ARMMCExpr::VK_TLSGD, "TLSGD"},
- {ARMMCExpr::VK_TLSGD_FDPIC, "tlsgd_fdpic"},
- {ARMMCExpr::VK_TLSLDM, "TLSLDM"},
- {ARMMCExpr::VK_TLSLDM_FDPIC, "tlsldm_fdpic"},
- {ARMMCExpr::VK_TPOFF, "TPOFF"},
+ {ARM::S_TLSCALL, "tlscall"},
+ {ARM::S_TLSDESC, "tlsdesc"},
+ {ARM::S_TLSGD, "TLSGD"},
+ {ARM::S_TLSGD_FDPIC, "tlsgd_fdpic"},
+ {ARM::S_TLSLDM, "TLSLDM"},
+ {ARM::S_TLSLDM_FDPIC, "tlsldm_fdpic"},
+ {ARM::S_TPOFF, "TPOFF"},
};
void ARMMCAsmInfoDarwin::anchor() { }
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
index 55d7b299674d3..baadf74e0d5a5 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.h
@@ -13,9 +13,11 @@
#ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCASMINFO_H
#define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCASMINFO_H
+#include "MCTargetDesc/ARMMCExpr.h"
#include "llvm/MC/MCAsmInfoCOFF.h"
#include "llvm/MC/MCAsmInfoDarwin.h"
#include "llvm/MC/MCAsmInfoELF.h"
+#include "llvm/MC/MCExpr.h"
namespace llvm {
class Triple;
@@ -50,6 +52,49 @@ class ARMCOFFMCAsmInfoGNU : public MCAsmInfoGNUCOFF {
explicit ARMCOFFMCAsmInfoGNU();
};
+namespace ARM {
+enum {
+ S_None,
+ S_HI16 =
+ MCSymbolRefExpr::FirstTargetSpecifier, // The R_ARM_MOVT_ABS relocation
+ // (:upper16: in the .s file)
+ S_LO16, // The R_ARM_MOVW_ABS_NC relocation (:lower16: in the .s file)
+
+ S_HI_8_15, // The R_ARM_THM_ALU_ABS_G3 relocation (:upper8_15: in
+ // the .s file)
+ S_HI_0_7, // The R_ARM_THM_ALU_ABS_G2_NC relocation (:upper0_8: in the
+ // .s file)
+ S_LO_8_15, // The R_ARM_THM_ALU_ABS_G1_NC relocation (:lower8_15: in
+ // the .s file)
+ S_LO_0_7, // The R_ARM_THM_ALU_ABS_G0_NC relocation (:lower0_7: in the
+ // .s file)
+
+ S_ARM_NONE,
+ S_FUNCDESC,
+ S_GOT,
+ S_GOTFUNCDESC,
+ S_GOTOFF,
+ S_GOTOFFFUNCDESC,
+ S_GOTTPOFF,
+ S_GOTTPOFF_FDPIC,
+ S_GOT_PREL,
+ S_PLT,
+ S_PREL31,
+ S_SBREL,
+ S_TARGET1,
+ S_TARGET2,
+ S_TLSCALL,
+ S_TLSDESC,
+ S_TLSDESCSEQ,
+ S_TLSGD,
+ S_TLSGD_FDPIC,
+ S_TLSLDM,
+ S_TLSLDM_FDPIC,
+ S_TLSLDO,
+ S_TPOFF,
+};
+}
+
} // namespace llvm
#endif
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
index e79cdbde62ca9..f006e00ada328 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
@@ -13,7 +13,7 @@
#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMBaseInfo.h"
#include "MCTargetDesc/ARMFixupKinds.h"
-#include "MCTargetDesc/ARMMCExpr.h"
+#include "MCTargetDesc/ARMMCAsmInfo.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/SmallVector.h"
@@ -1201,18 +1201,18 @@ uint32_t ARMMCCodeEmitter::getHiLoImmOpValue(const MCInst &MI, unsigned OpIdx,
report_fatal_error("constant value truncated (limited to 32-bit)");
switch (ARM16Expr->getSpecifier()) {
- case ARMMCExpr::VK_HI16:
+ case ARM::S_HI16:
return (int32_t(Value) & 0xffff0000) >> 16;
- case ARMMCExpr::VK_LO16:
+ case ARM::S_LO16:
return (int32_t(Value) & 0x0000ffff);
- case ARMMCExpr::VK_HI_8_15:
+ case ARM::S_HI_8_15:
return (int32_t(Value) & 0xff000000) >> 24;
- case ARMMCExpr::VK_HI_0_7:
+ case ARM::S_HI_0_7:
return (int32_t(Value) & 0x00ff0000) >> 16;
- case ARMMCExpr::VK_LO_8_15:
+ case ARM::S_LO_8_15:
return (int32_t(Value) & 0x0000ff00) >> 8;
- case ARMMCExpr::VK_LO_0_7:
+ case ARM::S_LO_0_7:
return (int32_t(Value) & 0x000000ff);
default: llvm_unreachable("Unsupported ARMFixup");
@@ -1221,30 +1221,30 @@ uint32_t ARMMCCodeEmitter::getHiLoImmOpValue(const MCInst &MI, unsigned OpIdx,
switch (ARM16Expr->getSpecifier()) {
default: llvm_unreachable("Unsupported ARMFixup");
- case ARMMCExpr::VK_HI16:
+ case ARM::S_HI16:
Kind = MCFixupKind(isThumb(STI) ? ARM::fixup_t2_movt_hi16
: ARM::fixup_arm_movt_hi16);
break;
- case ARMMCExpr::VK_LO16:
+ case ARM::S_LO16:
Kind = MCFixupKind(isThumb(STI) ? ARM::fixup_t2_movw_lo16
: ARM::fixup_arm_movw_lo16);
break;
- case ARMMCExpr::VK_HI_8_15:
+ case ARM::S_HI_8_15:
if (!isThumb(STI))
llvm_unreachable(":upper_8_15: not supported in Arm state");
Kind = MCFixupKind(ARM::fixup_arm_thumb_upper_8_15);
break;
- case ARMMCExpr::VK_HI_0_7:
+ case ARM::S_HI_0_7:
if (!isThumb(STI))
llvm_unreachable(":upper_0_7: not supported in Arm state");
Kind = MCFixupKind(ARM::fixup_arm_thumb_upper_0_7);
break;
- case ARMMCExpr::VK_LO_8_15:
+ case ARM::S_LO_8_15:
if (!isThumb(STI))
llvm_unreachable(":lower_8_15: not supported in Arm state");
Kind = MCFixupKind(ARM::fixup_arm_thumb_lower_8_15);
break;
- case ARMMCExpr::VK_LO_0_7:
+ case ARM::S_LO_0_7:
if (!isThumb(STI))
llvm_unreachable(":lower_0_7: not supported in Arm state");
Kind = MCFixupKind(ARM::fixup_arm_thumb_lower_0_7);
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
index 1035a9e131c48..1e6760a57608a 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.cpp
@@ -7,6 +7,7 @@
//===----------------------------------------------------------------------===//
#include "ARMMCExpr.h"
+#include "ARMMCAsmInfo.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCStreamer.h"
@@ -22,22 +23,22 @@ const ARMMCExpr *ARMMCExpr::create(Specifier S, const MCExpr *Expr,
void ARMMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
switch (specifier) {
default: llvm_unreachable("Invalid kind!");
- case VK_HI16:
+ case ARM::S_HI16:
OS << ":upper16:";
break;
- case VK_LO16:
+ case ARM::S_LO16:
OS << ":lower16:";
break;
- case VK_HI_8_15:
+ case ARM::S_HI_8_15:
OS << ":upper8_15:";
break;
- case VK_HI_0_7:
+ case ARM::S_HI_0_7:
OS << ":upper0_7:";
break;
- case VK_LO_8_15:
+ case ARM::S_LO_8_15:
OS << ":lower8_15:";
break;
- case VK_LO_0_7:
+ case ARM::S_LO_0_7:
OS << ":lower0_7:";
break;
}
@@ -49,3 +50,29 @@ void ARMMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
if (Expr->getKind() != MCExpr::SymbolRef)
OS << ')';
}
+
+const ARMMCExpr *ARMMCExpr::createUpper16(const MCExpr *Expr, MCContext &Ctx) {
+ return ARMMCExpr::create(ARM::S_HI16, Expr, Ctx);
+}
+
+const ARMMCExpr *ARMMCExpr::createLower16(const MCExpr *Expr, MCContext &Ctx) {
+ return ARMMCExpr::create(ARM::S_LO16, Expr, Ctx);
+}
+
+const ARMMCExpr *ARMMCExpr::createUpper8_15(const MCExpr *Expr,
+ MCContext &Ctx) {
+ return ARMMCExpr::create(ARM::S_HI_8_15, Expr, Ctx);
+}
+
+const ARMMCExpr *ARMMCExpr::createUpper0_7(const MCExpr *Expr, MCContext &Ctx) {
+ return ARMMCExpr::create(ARM::S_HI_0_7, Expr, Ctx);
+}
+
+const ARMMCExpr *ARMMCExpr::createLower8_15(const MCExpr *Expr,
+ MCContext &Ctx) {
+ return ARMMCExpr::create(ARM::S_LO_8_15, Expr, Ctx);
+}
+
+const ARMMCExpr *ARMMCExpr::createLower0_7(const MCExpr *Expr, MCContext &Ctx) {
+ return ARMMCExpr::create(ARM::S_LO_0_7, Expr, Ctx);
+}
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
index bcd92de3434ab..f29d05ba2a88d 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCExpr.h
@@ -16,46 +16,6 @@ namespace llvm {
class ARMMCExpr : public MCSpecifierExpr {
public:
using Specifier = uint16_t;
- enum {
- VK_None,
- VK_HI16 =
- MCSymbolRefExpr::FirstTargetSpecifier, // The R_ARM_MOVT_ABS relocation
- // (:upper16: in the .s file)
- VK_LO16, // The R_ARM_MOVW_ABS_NC relocation (:lower16: in the .s file)
-
- VK_HI_8_15, // The R_ARM_THM_ALU_ABS_G3 relocation (:upper8_15: in
- // the .s file)
- VK_HI_0_7, // The R_ARM_THM_ALU_ABS_G2_NC relocation (:upper0_8: in the
- // .s file)
- VK_LO_8_15, // The R_ARM_THM_ALU_ABS_G1_NC relocation (:lower8_15: in
- // the .s file)
- VK_LO_0_7, // The R_ARM_THM_ALU_ABS_G0_NC relocation (:lower0_7: in the
- // .s file)
-
- VK_ARM_NONE,
- VK_FUNCDESC,
- VK_GOT,
- VK_GOTFUNCDESC,
- VK_GOTOFF,
- VK_GOTOFFFUNCDESC,
- VK_GOTTPOFF,
- VK_GOTTPOFF_FDPIC,
- VK_GOT_PREL,
- VK_PLT,
- VK_PREL31,
- VK_SBREL,
- VK_TARGET1,
- VK_TARGET2,
- VK_TLSCALL,
- VK_TLSDESC,
- VK_TLSDESCSEQ,
- VK_TLSGD,
- VK_TLSGD_FDPIC,
- VK_TLSLDM,
- VK_TLSLDM_FDPIC,
- VK_TLSLDO,
- VK_TPOFF,
- };
private:
explicit ARMMCExpr(Specifier S, const MCExpr *Expr)
@@ -65,29 +25,12 @@ class ARMMCExpr : public MCSpecifierExpr {
static const ARMMCExpr *create(Specifier S, const MCExpr *Expr,
MCContext &Ctx);
- static const ARMMCExpr *createUpper16(const MCExpr *Expr, MCContext &Ctx) {
- return create(VK_HI16, Expr, Ctx);
- }
-
- static const ARMMCExpr *createLower16(const MCExpr *Expr, MCContext &Ctx) {
- return create(VK_LO16, Expr, Ctx);
- }
-
- static const ARMMCExpr *createUpper8_15(const MCExpr *Expr, MCContext &Ctx) {
- return create(VK_HI_8_15, Expr, Ctx);
- }
-
- static const ARMMCExpr *createUpper0_7(const MCExpr *Expr, MCContext &Ctx) {
- return create(VK_HI_0_7, Expr, Ctx);
- }
-
- static const ARMMCExpr *createLower8_15(const MCExpr *Expr, MCContext &Ctx) {
- return create(VK_LO_8_15, Expr, Ctx);
- }
-
- static const ARMMCExpr *createLower0_7(const MCExpr *Expr, MCContext &Ctx) {
- return create(VK_LO_0_7, Expr, Ctx);
- }
+ static const ARMMCExpr *createUpper16(const MCExpr *Expr, MCContext &Ctx);
+ static const ARMMCExpr *createLower16(const MCExpr *Expr, MCContext &Ctx);
+ static const ARMMCExpr *createUpper8_15(const MCExpr *Expr, MCContext &Ctx);
+ static const ARMMCExpr *createUpper0_7(const MCExpr *Expr, MCContext &Ctx);
+ static const ARMMCExpr *createLower8_15(const MCExpr *Expr, MCContext &Ctx);
+ static const ARMMCExpr *createLower0_7(const MCExpr *Expr, MCContext &Ctx);
void printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const override;
bool evaluateAsRelocatableImpl(MCValue &Res,
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