[llvm] e3025c9 - RISCV: Rename RISCVMCExpr::VK_ to RISCV::S_
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 15 15:51:16 PDT 2025
Author: Fangrui Song
Date: 2025-06-15T15:51:10-07:00
New Revision: e3025c95090f74b26e36106d2aa394b213f713a1
URL: https://github.com/llvm/llvm-project/commit/e3025c95090f74b26e36106d2aa394b213f713a1
DIFF: https://github.com/llvm/llvm-project/commit/e3025c95090f74b26e36106d2aa394b213f713a1.diff
LOG: RISCV: Rename RISCVMCExpr::VK_ to RISCV::S_
Prepare for removing RISCVMCExpr. Adopt the newer naming convention (S_)
used by AMDGPU/WebAssembly/VE/M68k/PowerPC.
Added:
Modified:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 1f434beca5388..040900064b90d 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -544,9 +544,9 @@ struct RISCVOperand final : public MCParsedAsmOperand {
if (evaluateConstantImm(getImm(), Imm))
return isShiftedInt<N - 1, 1>(fixImmediateForRV32(Imm, isRV64Imm()));
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
+ RISCVMCExpr::Specifier VK = RISCV::S_None;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
- VK == RISCVMCExpr::VK_None;
+ VK == RISCV::S_None;
}
// True if operand is a symbol with no modifiers, or a constant with no
@@ -559,9 +559,9 @@ struct RISCVOperand final : public MCParsedAsmOperand {
if (evaluateConstantImm(getImm(), Imm))
return isInt<N>(fixImmediateForRV32(Imm, isRV64Imm()));
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
+ RISCVMCExpr::Specifier VK = RISCV::S_None;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
- VK == RISCVMCExpr::VK_None;
+ VK == RISCV::S_None;
}
// Predicate methods for AsmOperands defined in RISCVInstrInfo.td
@@ -572,9 +572,9 @@ struct RISCVOperand final : public MCParsedAsmOperand {
if (!isImm() || evaluateConstantImm(getImm(), Imm))
return false;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
+ RISCVMCExpr::Specifier VK = RISCV::S_None;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
- VK == RISCVMCExpr::VK_None;
+ VK == RISCV::S_None;
}
bool isCallSymbol() const {
@@ -583,7 +583,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
if (!isImm() || evaluateConstantImm(getImm(), Imm))
return false;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
+ RISCVMCExpr::Specifier VK = RISCV::S_None;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
VK == ELF::R_RISCV_CALL_PLT;
}
@@ -594,7 +594,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
if (!isImm() || evaluateConstantImm(getImm(), Imm))
return false;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
+ RISCVMCExpr::Specifier VK = RISCV::S_None;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
VK == ELF::R_RISCV_CALL_PLT;
}
@@ -605,7 +605,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
if (!isImm() || evaluateConstantImm(getImm(), Imm))
return false;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
+ RISCVMCExpr::Specifier VK = RISCV::S_None;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
VK == ELF::R_RISCV_TPREL_ADD;
}
@@ -616,7 +616,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
if (!isImm() || evaluateConstantImm(getImm(), Imm))
return false;
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
+ RISCVMCExpr::Specifier VK = RISCV::S_None;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
VK == ELF::R_RISCV_TLSDESC_CALL;
}
@@ -870,11 +870,10 @@ struct RISCVOperand final : public MCParsedAsmOperand {
if (evaluateConstantImm(getImm(), Imm))
return isInt<12>(fixImmediateForRV32(Imm, isRV64Imm()));
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
+ RISCVMCExpr::Specifier VK = RISCV::S_None;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
- (VK == RISCVMCExpr::VK_LO || VK == RISCVMCExpr::VK_PCREL_LO ||
- VK == RISCVMCExpr::VK_TPREL_LO ||
- VK == ELF::R_RISCV_TLSDESC_LOAD_LO12 ||
+ (VK == RISCV::S_LO || VK == RISCV::S_PCREL_LO ||
+ VK == RISCV::S_TPREL_LO || VK == ELF::R_RISCV_TLSDESC_LOAD_LO12 ||
VK == ELF::R_RISCV_TLSDESC_ADD_LO12);
}
@@ -903,9 +902,9 @@ struct RISCVOperand final : public MCParsedAsmOperand {
if (evaluateConstantImm(getImm(), Imm))
return isInt<20>(fixImmediateForRV32(Imm, isRV64Imm()));
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
+ RISCVMCExpr::Specifier VK = RISCV::S_None;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
- VK == RISCVMCExpr::VK_QC_ABS20;
+ VK == RISCV::S_QC_ABS20;
}
bool isUImm20LUI() const {
@@ -916,7 +915,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
if (evaluateConstantImm(getImm(), Imm))
return isUInt<20>(Imm);
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
+ RISCVMCExpr::Specifier VK = RISCV::S_None;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
(VK == ELF::R_RISCV_HI20 || VK == ELF::R_RISCV_TPREL_HI20);
}
@@ -929,7 +928,7 @@ struct RISCVOperand final : public MCParsedAsmOperand {
if (evaluateConstantImm(getImm(), Imm))
return isUInt<20>(Imm);
- RISCVMCExpr::Specifier VK = RISCVMCExpr::VK_None;
+ RISCVMCExpr::Specifier VK = RISCV::S_None;
return RISCVAsmParser::classifySymbolRef(getImm(), VK) &&
(VK == ELF::R_RISCV_PCREL_HI20 || VK == ELF::R_RISCV_GOT_HI20 ||
VK == ELF::R_RISCV_TLS_GOT_HI20 || VK == ELF::R_RISCV_TLS_GD_HI20 ||
@@ -2920,7 +2919,7 @@ bool RISCVAsmParser::parseInstruction(ParseInstructionInfo &Info,
bool RISCVAsmParser::classifySymbolRef(const MCExpr *Expr,
RISCVMCExpr::Specifier &Kind) {
- Kind = RISCVMCExpr::VK_None;
+ Kind = RISCV::S_None;
if (const RISCVMCExpr *RE = dyn_cast<RISCVMCExpr>(Expr)) {
Kind = RE->getSpecifier();
@@ -2929,14 +2928,14 @@ bool RISCVAsmParser::classifySymbolRef(const MCExpr *Expr,
MCValue Res;
if (Expr->evaluateAsRelocatable(Res, nullptr))
- return Res.getSpecifier() == RISCVMCExpr::VK_None;
+ return Res.getSpecifier() == RISCV::S_None;
return false;
}
bool RISCVAsmParser::isSymbolDiff(const MCExpr *Expr) {
MCValue Res;
if (Expr->evaluateAsRelocatable(Res, nullptr)) {
- return Res.getSpecifier() == RISCVMCExpr::VK_None && Res.getAddSym() &&
+ return Res.getSpecifier() == RISCV::S_None && Res.getAddSym() &&
Res.getSubSym();
}
return false;
@@ -3451,7 +3450,7 @@ void RISCVAsmParser::emitAuipcInstPair(MCRegister DestReg, MCRegister TmpReg,
MCInstBuilder(RISCV::AUIPC).addReg(TmpReg).addExpr(SymbolHi));
const MCExpr *RefToLinkTmpLabel = RISCVMCExpr::create(
- MCSymbolRefExpr::create(TmpLabel, Ctx), RISCVMCExpr::VK_PCREL_LO, Ctx);
+ MCSymbolRefExpr::create(TmpLabel, Ctx), RISCV::S_PCREL_LO, Ctx);
emitToStreamer(Out, MCInstBuilder(SecondOpcode)
.addReg(DestReg)
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
index dd5540038c437..20014611499c1 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
@@ -580,7 +580,7 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
// encounter it here is an error.
llvm_unreachable(
"ELF::R_RISCV_TPREL_ADD should not represent an instruction operand");
- case RISCVMCExpr::VK_LO:
+ case RISCV::S_LO:
if (MIFrm == RISCVII::InstFormatI)
FixupKind = RISCV::fixup_riscv_lo12_i;
else if (MIFrm == RISCVII::InstFormatS)
@@ -593,7 +593,7 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
FixupKind = RISCV::fixup_riscv_hi20;
RelaxCandidate = true;
break;
- case RISCVMCExpr::VK_PCREL_LO:
+ case RISCV::S_PCREL_LO:
if (MIFrm == RISCVII::InstFormatI)
FixupKind = RISCV::fixup_riscv_pcrel_lo12_i;
else if (MIFrm == RISCVII::InstFormatS)
@@ -606,7 +606,7 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
FixupKind = RISCV::fixup_riscv_pcrel_hi20;
RelaxCandidate = true;
break;
- case RISCVMCExpr::VK_TPREL_LO:
+ case RISCV::S_TPREL_LO:
if (MIFrm == RISCVII::InstFormatI)
FixupKind = ELF::R_RISCV_TPREL_LO12_I;
else if (MIFrm == RISCVII::InstFormatS)
@@ -622,7 +622,7 @@ uint64_t RISCVMCCodeEmitter::getImmOpValue(const MCInst &MI, unsigned OpNo,
FixupKind = RISCV::fixup_riscv_call_plt;
RelaxCandidate = true;
break;
- case RISCVMCExpr::VK_QC_ABS20:
+ case RISCV::S_QC_ABS20:
FixupKind = RISCV::fixup_riscv_qc_abs20_u;
RelaxCandidate = true;
break;
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
index f5f40ad44ac19..ce0ac067cb278 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp
@@ -33,7 +33,7 @@ const RISCVMCExpr *RISCVMCExpr::create(const MCExpr *Expr, Specifier S,
void RISCVMCExpr::printImpl(raw_ostream &OS, const MCAsmInfo *MAI) const {
Specifier S = getSpecifier();
- bool HasVariant = S != VK_None && S != ELF::R_RISCV_CALL_PLT;
+ bool HasVariant = S != RISCV::S_None && S != ELF::R_RISCV_CALL_PLT;
if (HasVariant)
OS << '%' << getSpecifierName(S) << '(';
@@ -90,12 +90,12 @@ const MCFixup *RISCVMCExpr::getPCRelHiFixup(const MCFragment **DFOut) const {
std::optional<RISCVMCExpr::Specifier>
RISCVMCExpr::getSpecifierForName(StringRef name) {
return StringSwitch<std::optional<RISCVMCExpr::Specifier>>(name)
- .Case("lo", VK_LO)
+ .Case("lo", RISCV::S_LO)
.Case("hi", ELF::R_RISCV_HI20)
- .Case("pcrel_lo", VK_PCREL_LO)
+ .Case("pcrel_lo", RISCV::S_PCREL_LO)
.Case("pcrel_hi", ELF::R_RISCV_PCREL_HI20)
.Case("got_pcrel_hi", ELF::R_RISCV_GOT_HI20)
- .Case("tprel_lo", VK_TPREL_LO)
+ .Case("tprel_lo", RISCV::S_TPREL_LO)
.Case("tprel_hi", ELF::R_RISCV_TPREL_HI20)
.Case("tprel_add", ELF::R_RISCV_TPREL_ADD)
.Case("tls_ie_pcrel_hi", ELF::R_RISCV_TLS_GOT_HI20)
@@ -104,7 +104,7 @@ RISCVMCExpr::getSpecifierForName(StringRef name) {
.Case("tlsdesc_load_lo", ELF::R_RISCV_TLSDESC_LOAD_LO12)
.Case("tlsdesc_add_lo", ELF::R_RISCV_TLSDESC_ADD_LO12)
.Case("tlsdesc_call", ELF::R_RISCV_TLSDESC_CALL)
- .Case("qc.abs20", VK_QC_ABS20)
+ .Case("qc.abs20", RISCV::S_QC_ABS20)
// Used in data directives
.Case("pltpcrel", ELF::R_RISCV_PLT32)
.Case("gotpcrel", ELF::R_RISCV_GOT32_PCREL)
@@ -113,19 +113,19 @@ RISCVMCExpr::getSpecifierForName(StringRef name) {
StringRef RISCVMCExpr::getSpecifierName(Specifier S) {
switch (S) {
- case VK_None:
+ case RISCV::S_None:
llvm_unreachable("not used as %specifier()");
- case VK_LO:
+ case RISCV::S_LO:
return "lo";
case ELF::R_RISCV_HI20:
return "hi";
- case VK_PCREL_LO:
+ case RISCV::S_PCREL_LO:
return "pcrel_lo";
case ELF::R_RISCV_PCREL_HI20:
return "pcrel_hi";
case ELF::R_RISCV_GOT_HI20:
return "got_pcrel_hi";
- case VK_TPREL_LO:
+ case RISCV::S_TPREL_LO:
return "tprel_lo";
case ELF::R_RISCV_TPREL_HI20:
return "tprel_hi";
@@ -151,7 +151,7 @@ StringRef RISCVMCExpr::getSpecifierName(Specifier S) {
return "gotpcrel";
case ELF::R_RISCV_PLT32:
return "pltpcrel";
- case VK_QC_ABS20:
+ case RISCV::S_QC_ABS20:
return "qc.abs20";
}
llvm_unreachable("Invalid ELF symbol kind");
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
index d3b4a94f2f281..7e3acdfcb87b2 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h
@@ -24,18 +24,6 @@ class StringRef;
class RISCVMCExpr : public MCSpecifierExpr {
public:
using Specifier = uint16_t;
- // Specifiers mapping to relocation types below FirstTargetFixupKind are
- // encoded literally, with these exceptions:
- enum {
- VK_None,
- // Specifiers mapping to distinct relocation types.
- VK_LO = FirstTargetFixupKind,
- VK_PCREL_LO,
- VK_TPREL_LO,
- // Vendor-specific relocation types might conflict across vendors.
- // Refer to them using Specifier constants.
- VK_QC_ABS20,
- };
private:
explicit RISCVMCExpr(const MCExpr *Expr, Specifier S)
@@ -57,6 +45,21 @@ class RISCVMCExpr : public MCSpecifierExpr {
static std::optional<Specifier> getSpecifierForName(StringRef name);
static StringRef getSpecifierName(Specifier Kind);
};
+
+namespace RISCV {
+// Specifiers mapping to relocation types below FirstTargetFixupKind are
+// encoded literally, with these exceptions:
+enum Specifier {
+ S_None,
+ // Specifiers mapping to distinct relocation types.
+ S_LO = FirstTargetFixupKind,
+ S_PCREL_LO,
+ S_TPREL_LO,
+ // Vendor-specific relocation types might conflict across vendors.
+ // Refer to them using Specifier constants.
+ S_QC_ABS20,
+};
+} // namespace RISCV
} // end namespace llvm.
#endif
diff --git a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
index 4fb71a3ed0006..4a75a559a9277 100644
--- a/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+++ b/llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
@@ -963,19 +963,19 @@ static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym,
default:
llvm_unreachable("Unknown target flag on GV operand");
case RISCVII::MO_None:
- Kind = RISCVMCExpr::VK_None;
+ Kind = RISCV::S_None;
break;
case RISCVII::MO_CALL:
Kind = ELF::R_RISCV_CALL_PLT;
break;
case RISCVII::MO_LO:
- Kind = RISCVMCExpr::VK_LO;
+ Kind = RISCV::S_LO;
break;
case RISCVII::MO_HI:
Kind = ELF::R_RISCV_HI20;
break;
case RISCVII::MO_PCREL_LO:
- Kind = RISCVMCExpr::VK_PCREL_LO;
+ Kind = RISCV::S_PCREL_LO;
break;
case RISCVII::MO_PCREL_HI:
Kind = ELF::R_RISCV_PCREL_HI20;
@@ -984,7 +984,7 @@ static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym,
Kind = ELF::R_RISCV_GOT_HI20;
break;
case RISCVII::MO_TPREL_LO:
- Kind = RISCVMCExpr::VK_TPREL_LO;
+ Kind = RISCV::S_TPREL_LO;
break;
case RISCVII::MO_TPREL_HI:
Kind = ELF::R_RISCV_TPREL_HI20;
@@ -1018,7 +1018,7 @@ static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym,
ME = MCBinaryExpr::createAdd(
ME, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
- if (Kind != RISCVMCExpr::VK_None)
+ if (Kind != RISCV::S_None)
ME = RISCVMCExpr::create(ME, Kind, Ctx);
return MCOperand::createExpr(ME);
}
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