[llvm] b16d43a - VE: Rename VEMCExpr::VK_ to VE::S_
Fangrui Song via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 15 10:46:52 PDT 2025
Author: Fangrui Song
Date: 2025-06-15T10:46:47-07:00
New Revision: b16d43a874748a496da5cd774dd864c95b78d6b0
URL: https://github.com/llvm/llvm-project/commit/b16d43a874748a496da5cd774dd864c95b78d6b0
DIFF: https://github.com/llvm/llvm-project/commit/b16d43a874748a496da5cd774dd864c95b78d6b0.diff
LOG: VE: Rename VEMCExpr::VK_ to VE::S_
Prepare for removing VEMCExpr. Adopt the newer naming convention adopted
by AMDGPU/WebAssembly.
Added:
Modified:
llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
llvm/lib/Target/VE/VEAsmPrinter.cpp
llvm/lib/Target/VE/VEISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp b/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
index a58ef127bbd5d..418587947e1ec 100644
--- a/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
+++ b/llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
@@ -1042,7 +1042,7 @@ bool VEAsmParser::parseLiteralValues(unsigned Size, SMLoc L) {
const MCExpr *VEAsmParser::extractSpecifier(const MCExpr *E,
VEMCExpr::Specifier &Variant) {
MCContext &Context = getParser().getContext();
- Variant = VEMCExpr::VK_None;
+ Variant = VE::S_None;
switch (E->getKind()) {
case MCExpr::Target:
@@ -1055,51 +1055,51 @@ const MCExpr *VEAsmParser::extractSpecifier(const MCExpr *E,
const MCSymbolRefExpr *SRE = cast<MCSymbolRefExpr>(E);
switch (SRE->getSpecifier()) {
- case VEMCExpr::VK_None:
+ case VE::S_None:
// Use VK_REFLONG to a symbol without modifiers.
- Variant = VEMCExpr::VK_REFLONG;
+ Variant = VE::S_REFLONG;
break;
- case VEMCExpr::VK_HI32:
- Variant = VEMCExpr::VK_HI32;
+ case VE::S_HI32:
+ Variant = VE::S_HI32;
break;
- case VEMCExpr::VK_LO32:
- Variant = VEMCExpr::VK_LO32;
+ case VE::S_LO32:
+ Variant = VE::S_LO32;
break;
- case VEMCExpr::VK_PC_HI32:
- Variant = VEMCExpr::VK_PC_HI32;
+ case VE::S_PC_HI32:
+ Variant = VE::S_PC_HI32;
break;
- case VEMCExpr::VK_PC_LO32:
- Variant = VEMCExpr::VK_PC_LO32;
+ case VE::S_PC_LO32:
+ Variant = VE::S_PC_LO32;
break;
- case VEMCExpr::VK_GOT_HI32:
- Variant = VEMCExpr::VK_GOT_HI32;
+ case VE::S_GOT_HI32:
+ Variant = VE::S_GOT_HI32;
break;
- case VEMCExpr::VK_GOT_LO32:
- Variant = VEMCExpr::VK_GOT_LO32;
+ case VE::S_GOT_LO32:
+ Variant = VE::S_GOT_LO32;
break;
- case VEMCExpr::VK_GOTOFF_HI32:
- Variant = VEMCExpr::VK_GOTOFF_HI32;
+ case VE::S_GOTOFF_HI32:
+ Variant = VE::S_GOTOFF_HI32;
break;
- case VEMCExpr::VK_GOTOFF_LO32:
- Variant = VEMCExpr::VK_GOTOFF_LO32;
+ case VE::S_GOTOFF_LO32:
+ Variant = VE::S_GOTOFF_LO32;
break;
- case VEMCExpr::VK_PLT_HI32:
- Variant = VEMCExpr::VK_PLT_HI32;
+ case VE::S_PLT_HI32:
+ Variant = VE::S_PLT_HI32;
break;
- case VEMCExpr::VK_PLT_LO32:
- Variant = VEMCExpr::VK_PLT_LO32;
+ case VE::S_PLT_LO32:
+ Variant = VE::S_PLT_LO32;
break;
- case VEMCExpr::VK_TLS_GD_HI32:
- Variant = VEMCExpr::VK_TLS_GD_HI32;
+ case VE::S_TLS_GD_HI32:
+ Variant = VE::S_TLS_GD_HI32;
break;
- case VEMCExpr::VK_TLS_GD_LO32:
- Variant = VEMCExpr::VK_TLS_GD_LO32;
+ case VE::S_TLS_GD_LO32:
+ Variant = VE::S_TLS_GD_LO32;
break;
- case VEMCExpr::VK_TPOFF_HI32:
- Variant = VEMCExpr::VK_TPOFF_HI32;
+ case VE::S_TPOFF_HI32:
+ Variant = VE::S_TPOFF_HI32;
break;
- case VEMCExpr::VK_TPOFF_LO32:
- Variant = VEMCExpr::VK_TPOFF_LO32;
+ case VE::S_TPOFF_LO32:
+ Variant = VE::S_TPOFF_LO32;
break;
default:
return nullptr;
@@ -1130,9 +1130,9 @@ const MCExpr *VEAsmParser::extractSpecifier(const MCExpr *E,
if (!RHS)
RHS = BE->getRHS();
- if (LHSVariant == VEMCExpr::VK_None)
+ if (LHSVariant == VE::S_None)
Variant = RHSVariant;
- else if (RHSVariant == VEMCExpr::VK_None)
+ else if (RHSVariant == VE::S_None)
Variant = LHSVariant;
else if (LHSVariant == RHSVariant)
Variant = LHSVariant;
diff --git a/llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
index e707bb2fe3e1d..bdedde505295f 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEELFObjectWriter.cpp
@@ -40,10 +40,10 @@ unsigned VEELFObjectWriter::getRelocType(const MCFixup &Fixup,
const MCValue &Target,
bool IsPCRel) const {
switch (Target.getSpecifier()) {
- case VEMCExpr::VK_TLS_GD_HI32:
- case VEMCExpr::VK_TLS_GD_LO32:
- case VEMCExpr::VK_TPOFF_HI32:
- case VEMCExpr::VK_TPOFF_LO32:
+ case VE::S_TLS_GD_HI32:
+ case VE::S_TLS_GD_LO32:
+ case VE::S_TPOFF_HI32:
+ case VE::S_TPOFF_LO32:
if (auto *SA = Target.getAddSym())
cast<MCSymbolELF>(SA)->setType(ELF::STT_TLS);
break;
@@ -51,7 +51,7 @@ unsigned VEELFObjectWriter::getRelocType(const MCFixup &Fixup,
break;
}
if (const VEMCExpr *SExpr = dyn_cast<VEMCExpr>(Fixup.getValue())) {
- if (SExpr->getSpecifier() == VEMCExpr::VK_PC_LO32)
+ if (SExpr->getSpecifier() == VE::S_PC_LO32)
return ELF::R_VE_PC_LO32;
}
diff --git a/llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
index fdde46f09d5b1..ac580f79a77b0 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
@@ -19,20 +19,20 @@
using namespace llvm;
const MCAsmInfo::VariantKindDesc variantKindDescs[] = {
- {VEMCExpr::VK_HI32, "hi"},
- {VEMCExpr::VK_LO32, "lo"},
- {VEMCExpr::VK_PC_HI32, "pc_hi"},
- {VEMCExpr::VK_PC_LO32, "pc_lo"},
- {VEMCExpr::VK_GOT_HI32, "got_hi"},
- {VEMCExpr::VK_GOT_LO32, "got_lo"},
- {VEMCExpr::VK_GOTOFF_HI32, "gotoff_hi"},
- {VEMCExpr::VK_GOTOFF_LO32, "gotoff_lo"},
- {VEMCExpr::VK_PLT_HI32, "plt_hi"},
- {VEMCExpr::VK_PLT_LO32, "plt_lo"},
- {VEMCExpr::VK_TLS_GD_HI32, "tls_gd_hi"},
- {VEMCExpr::VK_TLS_GD_LO32, "tls_gd_lo"},
- {VEMCExpr::VK_TPOFF_HI32, "tpoff_hi"},
- {VEMCExpr::VK_TPOFF_LO32, "tpoff_lo"},
+ {VE::S_HI32, "hi"},
+ {VE::S_LO32, "lo"},
+ {VE::S_PC_HI32, "pc_hi"},
+ {VE::S_PC_LO32, "pc_lo"},
+ {VE::S_GOT_HI32, "got_hi"},
+ {VE::S_GOT_LO32, "got_lo"},
+ {VE::S_GOTOFF_HI32, "gotoff_hi"},
+ {VE::S_GOTOFF_LO32, "gotoff_lo"},
+ {VE::S_PLT_HI32, "plt_hi"},
+ {VE::S_PLT_LO32, "plt_lo"},
+ {VE::S_TLS_GD_HI32, "tls_gd_hi"},
+ {VE::S_TLS_GD_LO32, "tls_gd_lo"},
+ {VE::S_TPOFF_HI32, "tpoff_hi"},
+ {VE::S_TPOFF_LO32, "tpoff_lo"},
};
void VEELFMCAsmInfo::anchor() {}
@@ -61,6 +61,6 @@ void VEELFMCAsmInfo::printSpecifierExpr(raw_ostream &OS,
const MCSpecifierExpr &Expr) const {
printExpr(OS, *Expr.getSubExpr());
auto specifier = Expr.getSpecifier();
- if (specifier && specifier != VEMCExpr::VK_REFLONG)
+ if (specifier && specifier != VE::S_REFLONG)
OS << '@' << getSpecifierName(specifier);
}
diff --git a/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
index 7dece1b309a96..c3fae1a0c77d4 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
@@ -99,7 +99,7 @@ unsigned VEMCCodeEmitter::getMachineOpValue(const MCInst &MI,
const MCExpr *Expr = MO.getExpr();
if (const VEMCExpr *SExpr = dyn_cast<VEMCExpr>(Expr)) {
- auto Kind = VEMCExpr::getFixupKind(SExpr->getSpecifier());
+ auto Kind = VE::getFixupKind(SExpr->getSpecifier());
Fixups.push_back(MCFixup::create(0, Expr, Kind));
return 0;
}
diff --git a/llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp b/llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
index fa4d9b18a9ad9..ed0eafc75888f 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.cpp
@@ -27,39 +27,39 @@ const VEMCExpr *VEMCExpr::create(Specifier S, const MCExpr *Expr,
return new (Ctx) VEMCExpr(Expr, S);
}
-VE::Fixups VEMCExpr::getFixupKind(MCSpecifierExpr::Spec S) {
+VE::Fixups VE::getFixupKind(uint8_t S) {
switch (S) {
default:
llvm_unreachable("Unhandled VEMCExpr::Specifier");
- case VK_REFLONG:
+ case VE::S_REFLONG:
return VE::fixup_ve_reflong;
- case VK_HI32:
+ case VE::S_HI32:
return VE::fixup_ve_hi32;
- case VK_LO32:
+ case VE::S_LO32:
return VE::fixup_ve_lo32;
- case VK_PC_HI32:
+ case VE::S_PC_HI32:
return VE::fixup_ve_pc_hi32;
- case VK_PC_LO32:
+ case VE::S_PC_LO32:
return VE::fixup_ve_pc_lo32;
- case VK_GOT_HI32:
+ case VE::S_GOT_HI32:
return VE::fixup_ve_got_hi32;
- case VK_GOT_LO32:
+ case VE::S_GOT_LO32:
return VE::fixup_ve_got_lo32;
- case VK_GOTOFF_HI32:
+ case VE::S_GOTOFF_HI32:
return VE::fixup_ve_gotoff_hi32;
- case VK_GOTOFF_LO32:
+ case VE::S_GOTOFF_LO32:
return VE::fixup_ve_gotoff_lo32;
- case VK_PLT_HI32:
+ case VE::S_PLT_HI32:
return VE::fixup_ve_plt_hi32;
- case VK_PLT_LO32:
+ case VE::S_PLT_LO32:
return VE::fixup_ve_plt_lo32;
- case VK_TLS_GD_HI32:
+ case VE::S_TLS_GD_HI32:
return VE::fixup_ve_tls_gd_hi32;
- case VK_TLS_GD_LO32:
+ case VE::S_TLS_GD_LO32:
return VE::fixup_ve_tls_gd_lo32;
- case VK_TPOFF_HI32:
+ case VE::S_TPOFF_HI32:
return VE::fixup_ve_tpoff_hi32;
- case VK_TPOFF_LO32:
+ case VE::S_TPOFF_LO32:
return VE::fixup_ve_tpoff_lo32;
}
}
diff --git a/llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h b/llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
index 4d191149d4aa0..d4e0f77c8ece8 100644
--- a/llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
+++ b/llvm/lib/Target/VE/MCTargetDesc/VEMCExpr.h
@@ -22,25 +22,7 @@ namespace llvm {
class StringRef;
class VEMCExpr : public MCSpecifierExpr {
public:
- enum Specifier {
- VK_None,
-
- VK_REFLONG = MCSymbolRefExpr::FirstTargetSpecifier,
- VK_HI32, // @hi
- VK_LO32, // @lo
- VK_PC_HI32, // @pc_hi
- VK_PC_LO32, // @pc_lo
- VK_GOT_HI32, // @got_hi
- VK_GOT_LO32, // @got_lo
- VK_GOTOFF_HI32, // @gotoff_hi
- VK_GOTOFF_LO32, // @gotoff_lo
- VK_PLT_HI32, // @plt_hi
- VK_PLT_LO32, // @plt_lo
- VK_TLS_GD_HI32, // @tls_gd_hi
- VK_TLS_GD_LO32, // @tls_gd_lo
- VK_TPOFF_HI32, // @tpoff_hi
- VK_TPOFF_LO32, // @tpoff_lo
- };
+ using Specifier = uint8_t;
private:
explicit VEMCExpr(const MCExpr *Expr, Specifier S)
@@ -52,10 +34,32 @@ class VEMCExpr : public MCSpecifierExpr {
bool evaluateAsRelocatableImpl(MCValue &Res,
const MCAssembler *Asm) const override;
+};
+
+namespace VE {
+enum Specifier {
+ S_None,
- static VE::Fixups getFixupKind(Spec S);
+ S_REFLONG = MCSymbolRefExpr::FirstTargetSpecifier,
+ S_HI32, // @hi
+ S_LO32, // @lo
+ S_PC_HI32, // @pc_hi
+ S_PC_LO32, // @pc_lo
+ S_GOT_HI32, // @got_hi
+ S_GOT_LO32, // @got_lo
+ S_GOTOFF_HI32, // @gotoff_hi
+ S_GOTOFF_LO32, // @gotoff_lo
+ S_PLT_HI32, // @plt_hi
+ S_PLT_LO32, // @plt_lo
+ S_TLS_GD_HI32, // @tls_gd_hi
+ S_TLS_GD_LO32, // @tls_gd_lo
+ S_TPOFF_HI32, // @tpoff_hi
+ S_TPOFF_LO32, // @tpoff_lo
};
+VE::Fixups getFixupKind(uint8_t S);
+} // namespace VE
+
} // namespace llvm
#endif
diff --git a/llvm/lib/Target/VE/VEAsmPrinter.cpp b/llvm/lib/Target/VE/VEAsmPrinter.cpp
index ee347cda05217..f0d6f52268544 100644
--- a/llvm/lib/Target/VE/VEAsmPrinter.cpp
+++ b/llvm/lib/Target/VE/VEAsmPrinter.cpp
@@ -194,8 +194,8 @@ void VEAsmPrinter::lowerGETGOTAndEmitMCInsts(const MachineInstr *MI,
case CodeModel::Small:
case CodeModel::Medium:
case CodeModel::Large:
- emitHiLo(*OutStreamer, GOTLabel, VEMCExpr::VK_HI32, VEMCExpr::VK_LO32,
- MCRegOP, OutContext, STI);
+ emitHiLo(*OutStreamer, GOTLabel, VE::S_HI32, VE::S_LO32, MCRegOP,
+ OutContext, STI);
break;
}
return;
@@ -209,14 +209,12 @@ void VEAsmPrinter::lowerGETGOTAndEmitMCInsts(const MachineInstr *MI,
// sic %plt
// lea.sl %got, _GLOBAL_OFFSET_TABLE_ at PC_HI(%plt, %got)
MCOperand cim24 = MCOperand::createImm(-24);
- MCOperand loImm =
- createGOTRelExprOp(VEMCExpr::VK_PC_LO32, GOTLabel, OutContext);
+ MCOperand loImm = createGOTRelExprOp(VE::S_PC_LO32, GOTLabel, OutContext);
emitLEAzii(*OutStreamer, cim24, loImm, MCRegOP, STI);
MCOperand M032 = MCOperand::createImm(M0(32));
emitANDrm(*OutStreamer, MCRegOP, M032, MCRegOP, STI);
emitSIC(*OutStreamer, RegPLT, STI);
- MCOperand hiImm =
- createGOTRelExprOp(VEMCExpr::VK_PC_HI32, GOTLabel, OutContext);
+ MCOperand hiImm = createGOTRelExprOp(VE::S_PC_HI32, GOTLabel, OutContext);
emitLEASLrri(*OutStreamer, RegGOT, RegPLT, hiImm, MCRegOP, STI);
}
@@ -257,14 +255,12 @@ void VEAsmPrinter::lowerGETFunPLTAndEmitMCInsts(const MachineInstr *MI,
// sic %plt ; FIXME: is it safe to use %plt here?
// lea.sl %dst, func at plt_hi(%plt, %dst)
MCOperand cim24 = MCOperand::createImm(-24);
- MCOperand loImm =
- createGOTRelExprOp(VEMCExpr::VK_PLT_LO32, AddrSym, OutContext);
+ MCOperand loImm = createGOTRelExprOp(VE::S_PLT_LO32, AddrSym, OutContext);
emitLEAzii(*OutStreamer, cim24, loImm, MCRegOP, STI);
MCOperand M032 = MCOperand::createImm(M0(32));
emitANDrm(*OutStreamer, MCRegOP, M032, MCRegOP, STI);
emitSIC(*OutStreamer, RegPLT, STI);
- MCOperand hiImm =
- createGOTRelExprOp(VEMCExpr::VK_PLT_HI32, AddrSym, OutContext);
+ MCOperand hiImm = createGOTRelExprOp(VE::S_PLT_HI32, AddrSym, OutContext);
emitLEASLrri(*OutStreamer, MCRegOP, RegPLT, hiImm, MCRegOP, STI);
}
@@ -305,22 +301,20 @@ void VEAsmPrinter::lowerGETTLSAddrAndEmitMCInsts(const MachineInstr *MI,
// lea.sl %s12, __tls_get_addr at plt_hi(%s12, %lr)
// bsic %lr, (, %s12)
MCOperand cim24 = MCOperand::createImm(-24);
- MCOperand loImm =
- createGOTRelExprOp(VEMCExpr::VK_TLS_GD_LO32, AddrSym, OutContext);
+ MCOperand loImm = createGOTRelExprOp(VE::S_TLS_GD_LO32, AddrSym, OutContext);
emitLEAzii(*OutStreamer, cim24, loImm, RegS0, STI);
MCOperand M032 = MCOperand::createImm(M0(32));
emitANDrm(*OutStreamer, RegS0, M032, RegS0, STI);
emitSIC(*OutStreamer, RegLR, STI);
- MCOperand hiImm =
- createGOTRelExprOp(VEMCExpr::VK_TLS_GD_HI32, AddrSym, OutContext);
+ MCOperand hiImm = createGOTRelExprOp(VE::S_TLS_GD_HI32, AddrSym, OutContext);
emitLEASLrri(*OutStreamer, RegS0, RegLR, hiImm, RegS0, STI);
MCOperand ci8 = MCOperand::createImm(8);
MCOperand loImm2 =
- createGOTRelExprOp(VEMCExpr::VK_PLT_LO32, GetTLSLabel, OutContext);
+ createGOTRelExprOp(VE::S_PLT_LO32, GetTLSLabel, OutContext);
emitLEAzii(*OutStreamer, ci8, loImm2, RegS12, STI);
emitANDrm(*OutStreamer, RegS12, M032, RegS12, STI);
MCOperand hiImm2 =
- createGOTRelExprOp(VEMCExpr::VK_PLT_HI32, GetTLSLabel, OutContext);
+ createGOTRelExprOp(VE::S_PLT_HI32, GetTLSLabel, OutContext);
emitLEASLrri(*OutStreamer, RegS12, RegLR, hiImm2, RegS12, STI);
emitBSIC(*OutStreamer, RegLR, RegS12, STI);
}
diff --git a/llvm/lib/Target/VE/VEISelLowering.cpp b/llvm/lib/Target/VE/VEISelLowering.cpp
index 313c894cafa85..b5a0d26abbf8e 100644
--- a/llvm/lib/Target/VE/VEISelLowering.cpp
+++ b/llvm/lib/Target/VE/VEISelLowering.cpp
@@ -664,7 +664,7 @@ SDValue VETargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
Callee = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, 0);
Callee = DAG.getNode(VEISD::GETFUNPLT, DL, PtrVT, Callee);
} else {
- Callee = makeHiLoPair(Callee, VEMCExpr::VK_HI32, VEMCExpr::VK_LO32, DAG);
+ Callee = makeHiLoPair(Callee, VE::S_HI32, VE::S_LO32, DAG);
}
} else if (ExternalSymbolSDNode *E = dyn_cast<ExternalSymbolSDNode>(Callee)) {
if (IsPICCall) {
@@ -673,7 +673,7 @@ SDValue VETargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
Callee = DAG.getTargetExternalSymbol(E->getSymbol(), PtrVT, 0);
Callee = DAG.getNode(VEISD::GETFUNPLT, DL, PtrVT, Callee);
} else {
- Callee = makeHiLoPair(Callee, VEMCExpr::VK_HI32, VEMCExpr::VK_LO32, DAG);
+ Callee = makeHiLoPair(Callee, VE::S_HI32, VE::S_LO32, DAG);
}
}
@@ -1020,8 +1020,8 @@ SDValue VETargetLowering::makeAddress(SDValue Op, SelectionDAG &DAG) const {
// lea %reg, label at gotoff_lo
// and %reg, %reg, (32)0
// lea.sl %reg, label at gotoff_hi(%reg, %got)
- SDValue HiLo = makeHiLoPair(Op, VEMCExpr::VK_GOTOFF_HI32,
- VEMCExpr::VK_GOTOFF_LO32, DAG);
+ SDValue HiLo =
+ makeHiLoPair(Op, VE::S_GOTOFF_HI32, VE::S_GOTOFF_LO32, DAG);
SDValue GlobalBase = DAG.getNode(VEISD::GLOBAL_BASE_REG, DL, PtrVT);
return DAG.getNode(ISD::ADD, DL, PtrVT, GlobalBase, HiLo);
}
@@ -1030,8 +1030,7 @@ SDValue VETargetLowering::makeAddress(SDValue Op, SelectionDAG &DAG) const {
// and %reg, %reg, (32)0
// lea.sl %reg, label at got_hi(%reg)
// ld %reg, (%reg, %got)
- SDValue HiLo =
- makeHiLoPair(Op, VEMCExpr::VK_GOT_HI32, VEMCExpr::VK_GOT_LO32, DAG);
+ SDValue HiLo = makeHiLoPair(Op, VE::S_GOT_HI32, VE::S_GOT_LO32, DAG);
SDValue GlobalBase = DAG.getNode(VEISD::GLOBAL_BASE_REG, DL, PtrVT);
SDValue AbsAddr = DAG.getNode(ISD::ADD, DL, PtrVT, GlobalBase, HiLo);
return DAG.getLoad(PtrVT, DL, DAG.getEntryNode(), AbsAddr,
@@ -1046,7 +1045,7 @@ SDValue VETargetLowering::makeAddress(SDValue Op, SelectionDAG &DAG) const {
case CodeModel::Medium:
case CodeModel::Large:
// abs64.
- return makeHiLoPair(Op, VEMCExpr::VK_HI32, VEMCExpr::VK_LO32, DAG);
+ return makeHiLoPair(Op, VE::S_HI32, VE::S_LO32, DAG);
}
}
@@ -1782,12 +1781,11 @@ SDValue VETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op,
SDValue Addr =
DAG.getTargetExternalSymbol(TM->getStrList()->back().c_str(), VT, 0);
if (isPositionIndependent()) {
- Addr = makeHiLoPair(Addr, VEMCExpr::VK_GOTOFF_HI32,
- VEMCExpr::VK_GOTOFF_LO32, DAG);
+ Addr = makeHiLoPair(Addr, VE::S_GOTOFF_HI32, VE::S_GOTOFF_LO32, DAG);
SDValue GlobalBase = DAG.getNode(VEISD::GLOBAL_BASE_REG, DL, VT);
return DAG.getNode(ISD::ADD, DL, VT, GlobalBase, Addr);
}
- return makeHiLoPair(Addr, VEMCExpr::VK_HI32, VEMCExpr::VK_LO32, DAG);
+ return makeHiLoPair(Addr, VE::S_HI32, VE::S_LO32, DAG);
}
}
}
@@ -2011,8 +2009,7 @@ SDValue VETargetLowering::getPICJumpTableRelocBase(SDValue Table,
// In order to do so, we need to genarate correctly marked DAG node using
// makeHiLoPair.
SDValue Op = DAG.getGlobalAddress(Function, DL, PtrTy);
- SDValue HiLo =
- makeHiLoPair(Op, VEMCExpr::VK_GOTOFF_HI32, VEMCExpr::VK_GOTOFF_LO32, DAG);
+ SDValue HiLo = makeHiLoPair(Op, VE::S_GOTOFF_HI32, VE::S_GOTOFF_LO32, DAG);
SDValue GlobalBase = DAG.getNode(VEISD::GLOBAL_BASE_REG, DL, PtrTy);
return DAG.getNode(ISD::ADD, DL, PtrTy, GlobalBase, HiLo);
}
@@ -2038,14 +2035,14 @@ Register VETargetLowering::prepareMBB(MachineBasicBlock &MBB,
BuildMI(MBB, I, DL, TII->get(VE::LEAzii), Tmp1)
.addImm(0)
.addImm(0)
- .addMBB(TargetBB, VEMCExpr::VK_GOTOFF_LO32);
+ .addMBB(TargetBB, VE::S_GOTOFF_LO32);
BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2)
.addReg(Tmp1, getKillRegState(true))
.addImm(M0(32));
BuildMI(MBB, I, DL, TII->get(VE::LEASLrri), Result)
.addReg(VE::SX15)
.addReg(Tmp2, getKillRegState(true))
- .addMBB(TargetBB, VEMCExpr::VK_GOTOFF_HI32);
+ .addMBB(TargetBB, VE::S_GOTOFF_HI32);
} else {
// Create following instructions for non-PIC code.
// lea %Tmp1, TargetBB at lo
@@ -2054,14 +2051,14 @@ Register VETargetLowering::prepareMBB(MachineBasicBlock &MBB,
BuildMI(MBB, I, DL, TII->get(VE::LEAzii), Tmp1)
.addImm(0)
.addImm(0)
- .addMBB(TargetBB, VEMCExpr::VK_LO32);
+ .addMBB(TargetBB, VE::S_LO32);
BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2)
.addReg(Tmp1, getKillRegState(true))
.addImm(M0(32));
BuildMI(MBB, I, DL, TII->get(VE::LEASLrii), Result)
.addReg(Tmp2, getKillRegState(true))
.addImm(0)
- .addMBB(TargetBB, VEMCExpr::VK_HI32);
+ .addMBB(TargetBB, VE::S_HI32);
}
return Result;
}
@@ -2099,14 +2096,14 @@ Register VETargetLowering::prepareSymbol(MachineBasicBlock &MBB,
BuildMI(MBB, I, DL, TII->get(VE::LEAzii), Tmp1)
.addImm(0)
.addImm(0)
- .addExternalSymbol(Symbol.data(), VEMCExpr::VK_GOTOFF_LO32);
+ .addExternalSymbol(Symbol.data(), VE::S_GOTOFF_LO32);
BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2)
.addReg(Tmp1, getKillRegState(true))
.addImm(M0(32));
BuildMI(MBB, I, DL, TII->get(VE::LEASLrri), Result)
.addReg(VE::SX15)
.addReg(Tmp2, getKillRegState(true))
- .addExternalSymbol(Symbol.data(), VEMCExpr::VK_GOTOFF_HI32);
+ .addExternalSymbol(Symbol.data(), VE::S_GOTOFF_HI32);
} else {
Register Tmp1 = MRI.createVirtualRegister(RC);
Register Tmp2 = MRI.createVirtualRegister(RC);
@@ -2119,14 +2116,14 @@ Register VETargetLowering::prepareSymbol(MachineBasicBlock &MBB,
BuildMI(MBB, I, DL, TII->get(VE::LEAzii), Tmp1)
.addImm(0)
.addImm(0)
- .addExternalSymbol(Symbol.data(), VEMCExpr::VK_GOT_LO32);
+ .addExternalSymbol(Symbol.data(), VE::S_GOT_LO32);
BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2)
.addReg(Tmp1, getKillRegState(true))
.addImm(M0(32));
BuildMI(MBB, I, DL, TII->get(VE::LEASLrri), Tmp3)
.addReg(VE::SX15)
.addReg(Tmp2, getKillRegState(true))
- .addExternalSymbol(Symbol.data(), VEMCExpr::VK_GOT_HI32);
+ .addExternalSymbol(Symbol.data(), VE::S_GOT_HI32);
BuildMI(MBB, I, DL, TII->get(VE::LDrii), Result)
.addReg(Tmp3, getKillRegState(true))
.addImm(0)
@@ -2142,14 +2139,14 @@ Register VETargetLowering::prepareSymbol(MachineBasicBlock &MBB,
BuildMI(MBB, I, DL, TII->get(VE::LEAzii), Tmp1)
.addImm(0)
.addImm(0)
- .addExternalSymbol(Symbol.data(), VEMCExpr::VK_LO32);
+ .addExternalSymbol(Symbol.data(), VE::S_LO32);
BuildMI(MBB, I, DL, TII->get(VE::ANDrm), Tmp2)
.addReg(Tmp1, getKillRegState(true))
.addImm(M0(32));
BuildMI(MBB, I, DL, TII->get(VE::LEASLrii), Result)
.addReg(Tmp2, getKillRegState(true))
.addImm(0)
- .addExternalSymbol(Symbol.data(), VEMCExpr::VK_HI32);
+ .addExternalSymbol(Symbol.data(), VE::S_HI32);
}
return Result;
}
@@ -2528,14 +2525,14 @@ VETargetLowering::emitSjLjDispatchBlock(MachineInstr &MI,
BuildMI(DispContBB, DL, TII->get(VE::LEAzii), Tmp1)
.addImm(0)
.addImm(0)
- .addJumpTableIndex(MJTI, VEMCExpr::VK_GOTOFF_LO32);
+ .addJumpTableIndex(MJTI, VE::S_GOTOFF_LO32);
BuildMI(DispContBB, DL, TII->get(VE::ANDrm), Tmp2)
.addReg(Tmp1, getKillRegState(true))
.addImm(M0(32));
BuildMI(DispContBB, DL, TII->get(VE::LEASLrri), BReg)
.addReg(VE::SX15)
.addReg(Tmp2, getKillRegState(true))
- .addJumpTableIndex(MJTI, VEMCExpr::VK_GOTOFF_HI32);
+ .addJumpTableIndex(MJTI, VE::S_GOTOFF_HI32);
} else {
// Create following instructions for non-PIC code.
// lea %Tmp1, .LJTI0_0 at lo
@@ -2544,14 +2541,14 @@ VETargetLowering::emitSjLjDispatchBlock(MachineInstr &MI,
BuildMI(DispContBB, DL, TII->get(VE::LEAzii), Tmp1)
.addImm(0)
.addImm(0)
- .addJumpTableIndex(MJTI, VEMCExpr::VK_LO32);
+ .addJumpTableIndex(MJTI, VE::S_LO32);
BuildMI(DispContBB, DL, TII->get(VE::ANDrm), Tmp2)
.addReg(Tmp1, getKillRegState(true))
.addImm(M0(32));
BuildMI(DispContBB, DL, TII->get(VE::LEASLrii), BReg)
.addReg(Tmp2, getKillRegState(true))
.addImm(0)
- .addJumpTableIndex(MJTI, VEMCExpr::VK_HI32);
+ .addJumpTableIndex(MJTI, VE::S_HI32);
}
switch (JTE) {
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