[llvm] e37707b - [RISCV] Use unsigned instead of uint16_t for the Opcode argument to getVectorLowDemandedScalarBits. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2025-06-13T18:06:03-07:00
New Revision: e37707b1e85cfc07fe75fd6b7e5d41963c52a8ec

URL: https://github.com/llvm/llvm-project/commit/e37707b1e85cfc07fe75fd6b7e5d41963c52a8ec
DIFF: https://github.com/llvm/llvm-project/commit/e37707b1e85cfc07fe75fd6b7e5d41963c52a8ec.diff

LOG: [RISCV] Use unsigned instead of uint16_t for the Opcode argument to getVectorLowDemandedScalarBits. NFC

All the callers pass an unsigned and uint16_t arguments are unusual.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    llvm/lib/Target/RISCV/RISCVInstrInfo.h

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index e5d29e1a8b476..107f645709c70 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -4581,7 +4581,7 @@ bool RISCV::hasEqualFRM(const MachineInstr &MI1, const MachineInstr &MI2) {
 }
 
 std::optional<unsigned>
-RISCV::getVectorLowDemandedScalarBits(uint16_t Opcode, unsigned Log2SEW) {
+RISCV::getVectorLowDemandedScalarBits(unsigned Opcode, unsigned Log2SEW) {
   switch (Opcode) {
   default:
     return std::nullopt;

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.h b/llvm/lib/Target/RISCV/RISCVInstrInfo.h
index 8260949cf918a..020be91e90e0b 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.h
@@ -364,7 +364,7 @@ bool hasEqualFRM(const MachineInstr &MI1, const MachineInstr &MI2);
 // If \p Opcode is a .vx vector instruction, returns the lower number of bits
 // that are used from the scalar .x operand for a given \p Log2SEW. Otherwise
 // returns null.
-std::optional<unsigned> getVectorLowDemandedScalarBits(uint16_t Opcode,
+std::optional<unsigned> getVectorLowDemandedScalarBits(unsigned Opcode,
                                                        unsigned Log2SEW);
 
 // Returns the MC opcode of RVV pseudo instruction.