[llvm] dec5765 - [X86] X86FixupInstTuning - add dbg message for each instruction replacement (#144083)
via llvm-commits
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Fri Jun 13 09:11:21 PDT 2025
Author: Simon Pilgrim
Date: 2025-06-13T17:11:18+01:00
New Revision: dec576514cb7106c59a5059ac6d52ebdf5de5275
URL: https://github.com/llvm/llvm-project/commit/dec576514cb7106c59a5059ac6d52ebdf5de5275
DIFF: https://github.com/llvm/llvm-project/commit/dec576514cb7106c59a5059ac6d52ebdf5de5275.diff
LOG: [X86] X86FixupInstTuning - add dbg message for each instruction replacement (#144083)
Help debug the changes the pass makes
Added:
Modified:
llvm/lib/Target/X86/X86FixupInstTuning.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86FixupInstTuning.cpp b/llvm/lib/Target/X86/X86FixupInstTuning.cpp
index 8c1ff523c975a..89093b2e1a3f5 100644
--- a/llvm/lib/Target/X86/X86FixupInstTuning.cpp
+++ b/llvm/lib/Target/X86/X86FixupInstTuning.cpp
@@ -132,11 +132,15 @@ bool X86FixupInstTuningPass::processInstruction(
auto ProcessVPERMILPDri = [&](unsigned NewOpc) -> bool {
if (!NewOpcPreferable(NewOpc))
return false;
- unsigned MaskImm = MI.getOperand(NumOperands - 1).getImm();
- MI.removeOperand(NumOperands - 1);
- MI.addOperand(MI.getOperand(NumOperands - 2));
- MI.setDesc(TII->get(NewOpc));
- MI.addOperand(MachineOperand::CreateImm(MaskImm));
+ LLVM_DEBUG(dbgs() << "Replacing: " << MI);
+ {
+ unsigned MaskImm = MI.getOperand(NumOperands - 1).getImm();
+ MI.removeOperand(NumOperands - 1);
+ MI.addOperand(MI.getOperand(NumOperands - 2));
+ MI.setDesc(TII->get(NewOpc));
+ MI.addOperand(MachineOperand::CreateImm(MaskImm));
+ }
+ LLVM_DEBUG(dbgs() << " With: " << MI);
return true;
};
@@ -147,11 +151,15 @@ bool X86FixupInstTuningPass::processInstruction(
auto ProcessVPERMILPSri = [&](unsigned NewOpc) -> bool {
if (!NewOpcPreferable(NewOpc))
return false;
- unsigned MaskImm = MI.getOperand(NumOperands - 1).getImm();
- MI.removeOperand(NumOperands - 1);
- MI.addOperand(MI.getOperand(NumOperands - 2));
- MI.setDesc(TII->get(NewOpc));
- MI.addOperand(MachineOperand::CreateImm(MaskImm));
+ LLVM_DEBUG(dbgs() << "Replacing: " << MI);
+ {
+ unsigned MaskImm = MI.getOperand(NumOperands - 1).getImm();
+ MI.removeOperand(NumOperands - 1);
+ MI.addOperand(MI.getOperand(NumOperands - 2));
+ MI.setDesc(TII->get(NewOpc));
+ MI.addOperand(MachineOperand::CreateImm(MaskImm));
+ }
+ LLVM_DEBUG(dbgs() << " With: " << MI);
return true;
};
@@ -164,7 +172,11 @@ bool X86FixupInstTuningPass::processInstruction(
if (!ST->hasNoDomainDelayShuffle() ||
!NewOpcPreferable(NewOpc, /*ReplaceInTie*/ false))
return false;
- MI.setDesc(TII->get(NewOpc));
+ LLVM_DEBUG(dbgs() << "Replacing: " << MI);
+ {
+ MI.setDesc(TII->get(NewOpc));
+ }
+ LLVM_DEBUG(dbgs() << " With: " << MI);
return true;
};
@@ -185,9 +197,12 @@ bool X86FixupInstTuningPass::processInstruction(
auto ProcessUNPCK = [&](unsigned NewOpc, unsigned MaskImm) -> bool {
if (!NewOpcPreferable(NewOpc, /*ReplaceInTie*/ false))
return false;
-
- MI.setDesc(TII->get(NewOpc));
- MI.addOperand(MachineOperand::CreateImm(MaskImm));
+ LLVM_DEBUG(dbgs() << "Replacing: " << MI);
+ {
+ MI.setDesc(TII->get(NewOpc));
+ MI.addOperand(MachineOperand::CreateImm(MaskImm));
+ }
+ LLVM_DEBUG(dbgs() << " With: " << MI);
return true;
};
@@ -198,7 +213,11 @@ bool X86FixupInstTuningPass::processInstruction(
if (!ST->hasNoDomainDelayShuffle() ||
!NewOpcPreferable(NewOpc, /*ReplaceInTie*/ false))
return false;
- MI.setDesc(TII->get(NewOpc));
+ LLVM_DEBUG(dbgs() << "Replacing: " << MI);
+ {
+ MI.setDesc(TII->get(NewOpc));
+ }
+ LLVM_DEBUG(dbgs() << " With: " << MI);
return true;
};
@@ -229,8 +248,12 @@ bool X86FixupInstTuningPass::processInstruction(
return false;
if (!OptSize && !NewOpcPreferable(MovOpc))
return false;
- MI.setDesc(TII->get(MovOpc));
- MI.removeOperand(NumOperands - 1);
+ LLVM_DEBUG(dbgs() << "Replacing: " << MI);
+ {
+ MI.setDesc(TII->get(MovOpc));
+ MI.removeOperand(NumOperands - 1);
+ }
+ LLVM_DEBUG(dbgs() << " With: " << MI);
return true;
};
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