[llvm] [PowerPC] (PR #144089)
zhijian lin via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 13 08:13:05 PDT 2025
https://github.com/diggerlin created https://github.com/llvm/llvm-project/pull/144089
None
>From 579f7dd7d25fd8e5bee2885a391ee313c4876dba Mon Sep 17 00:00:00 2001
From: zhijian <zhijian at ca.ibm.com>
Date: Mon, 2 Jun 2025 19:04:30 +0000
Subject: [PATCH 1/2] conbine LBARX and RLWINM
---
llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 31 ++++++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
index 18350650bfe2d..d7388956d1763 100644
--- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
@@ -1281,7 +1281,36 @@ bool PPCMIPeephole::simplifyCode() {
Simplified = true;
break;
}
- case PPC::RLWINM:
+ case PPC::RLWINM: {
+ Register SrcReg = MI.getOperand(1).getReg();
+ MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
+
+ if (DefMI) {
+ unsigned Opcode = DefMI->getOpcode();
+ if (Opcode == PPC::LBARX || Opcode == PPC::LHARX) {
+ unsigned SH = MI.getOperand(2).getImm();
+ unsigned MB = MI.getOperand(3).getImm();
+ unsigned ME = MI.getOperand(4).getImm();
+
+ if (SH == 0 && ME == 31 &&
+ ((MB == 24 && Opcode == PPC::LBARX) ||
+ (MB == 16 && Opcode == PPC::LHARX))) {
+ Register SrcReg = MI.getOperand(0).getReg();
+ Register DstReg =
+ DefMI->getOperand(0).getReg();
+
+ // Replace all uses of RLWINM's result with LBARX result
+ MRI->replaceRegWith(DstReg, SrcReg);
+ addRegToUpdate(DstReg);
+ addRegToUpdate(SrcReg);
+ ToErase = &MI;
+ Simplified = true;
+ break;
+ }
+ }
+ }
+ [[fall_through]];
+ }
case PPC::RLWINM_rec:
case PPC::RLWINM8:
case PPC::RLWINM8_rec: {
>From bcfc75f613c1cc90e86391e7f9ffcd120eaa6d3c Mon Sep 17 00:00:00 2001
From: zhijian <zhijian at ca.ibm.com>
Date: Fri, 13 Jun 2025 15:14:36 +0000
Subject: [PATCH 2/2] change test cases based on the new behavious and run the
update_llc_test_checks.py
---
llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 4 +
.../CodeGen/PowerPC/PR35812-neg-cmpxchg.ll | 92 +-
llvm/test/CodeGen/PowerPC/all-atomics.ll | 1913 ++++++++---------
.../CodeGen/PowerPC/atomics-regression.ll | 68 -
llvm/test/CodeGen/PowerPC/loop-comment.ll | 13 +-
5 files changed, 1005 insertions(+), 1085 deletions(-)
diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
index d7388956d1763..736443d555b9f 100644
--- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
@@ -1292,6 +1292,10 @@ bool PPCMIPeephole::simplifyCode() {
unsigned MB = MI.getOperand(3).getImm();
unsigned ME = MI.getOperand(4).getImm();
+ // LBARX already sets the upper 24 bits of the destination register
+ // to zero. If the register is cleared to zero in the upper 24 bits
+ // using RLWINM later, we eliminate the RLWINM. Same applies to
+ // LHARX.
if (SH == 0 && ME == 31 &&
((MB == 24 && Opcode == PPC::LBARX) ||
(MB == 16 && Opcode == PPC::LHARX))) {
diff --git a/llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll b/llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
index 1a8dabc5ad719..b7852c3c3e6e0 100644
--- a/llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
+++ b/llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
@@ -18,54 +18,52 @@ define signext i32 @main() nounwind {
; CHECK-NEXT: sth 3, 46(1)
; CHECK-NEXT: addi 3, 1, 46
; CHECK-NEXT: lharx 4, 0, 3
-; CHECK-NEXT: clrlwi 4, 4, 16
-; CHECK-NEXT: cmplwi 4, 33059
-; CHECK-NEXT: bne 0, .LBB0_4
-; CHECK-NEXT: # %bb.1: # %cmpxchg.fencedstore
+; CHECK-NEXT: cmplwi 4, 33059
+; CHECK-NEXT: bne 0, .LBB0_4
+; CHECK-NEXT: # %bb.1: # %cmpxchg.fencedstore
; CHECK-NEXT: sync
; CHECK-NEXT: li 4, 234
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB0_2: # %cmpxchg.trystore
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB0_2: # %cmpxchg.trystore
+; CHECK-NEXT: #
; CHECK-NEXT: sthcx. 4, 0, 3
-; CHECK-NEXT: beq 0, .LBB0_7
-; CHECK-NEXT: # %bb.3: # %cmpxchg.releasedload
-; CHECK-NEXT: # in Loop: Header=BB0_2 Depth=1
+; CHECK-NEXT: beq 0, .LBB0_7
+; CHECK-NEXT: # %bb.3: # %cmpxchg.releasedload
+; CHECK-NEXT: #
; CHECK-NEXT: lharx 5, 0, 3
-; CHECK-NEXT: clrlwi 5, 5, 16
-; CHECK-NEXT: cmplwi 5, 33059
-; CHECK-NEXT: beq 0, .LBB0_2
-; CHECK-NEXT: .LBB0_4: # %cmpxchg.nostore
+; CHECK-NEXT: cmplwi 5, 33059
+; CHECK-NEXT: beq 0, .LBB0_2
+; CHECK-NEXT: .LBB0_4: # %cmpxchg.nostore
; CHECK-NEXT: lwsync
; CHECK-NEXT: b .LBB0_8
-; CHECK-NEXT: .LBB0_5: # %L.B0000
+; CHECK-NEXT: .LBB0_5: # %L.B0000
; CHECK-NEXT: lhz 3, 46(1)
-; CHECK-NEXT: cmplwi 3, 234
-; CHECK-NEXT: bne 0, .LBB0_9
-; CHECK-NEXT: # %bb.6: # %L.B0001
+; CHECK-NEXT: cmplwi 3, 234
+; CHECK-NEXT: bne 0, .LBB0_9
+; CHECK-NEXT: # %bb.6: # %L.B0001
; CHECK-NEXT: addis 3, 2, .L_MergedGlobals at toc@ha
; CHECK-NEXT: addi 3, 3, .L_MergedGlobals at toc@l
; CHECK-NEXT: bl puts
; CHECK-NEXT: nop
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: b .LBB0_11
-; CHECK-NEXT: .LBB0_7: # %cmpxchg.success
+; CHECK-NEXT: .LBB0_7: # %cmpxchg.success
; CHECK-NEXT: lwsync
; CHECK-NEXT: b .LBB0_5
-; CHECK-NEXT: .LBB0_8: # %L.B0003
+; CHECK-NEXT: .LBB0_8: # %L.B0003
; CHECK-NEXT: addis 3, 2, .L_MergedGlobals at toc@ha
; CHECK-NEXT: addi 3, 3, .L_MergedGlobals at toc@l
; CHECK-NEXT: addi 3, 3, 16
; CHECK-NEXT: b .LBB0_10
-; CHECK-NEXT: .LBB0_9: # %L.B0005
+; CHECK-NEXT: .LBB0_9: # %L.B0005
; CHECK-NEXT: addis 3, 2, .L_MergedGlobals at toc@ha
; CHECK-NEXT: addi 3, 3, .L_MergedGlobals at toc@l
; CHECK-NEXT: addi 3, 3, 64
-; CHECK-NEXT: .LBB0_10: # %L.B0003
+; CHECK-NEXT: .LBB0_10: # %L.B0003
; CHECK-NEXT: bl puts
; CHECK-NEXT: nop
; CHECK-NEXT: li 3, 1
-; CHECK-NEXT: .LBB0_11: # %L.B0003
+; CHECK-NEXT: .LBB0_11: # %L.B0003
; CHECK-NEXT: addi 1, 1, 48
; CHECK-NEXT: ld 0, 16(1)
; CHECK-NEXT: mtlr 0
@@ -83,62 +81,62 @@ define signext i32 @main() nounwind {
; CHECK-P7-NEXT: rlwinm 4, 4, 3, 27, 27
; CHECK-P7-NEXT: lwarx 5, 0, 3
; CHECK-P7-NEXT: srw 6, 5, 4
-; CHECK-P7-NEXT: clrlwi 6, 6, 16
-; CHECK-P7-NEXT: cmplwi 6, 33059
-; CHECK-P7-NEXT: bne 0, .LBB0_4
-; CHECK-P7-NEXT: # %bb.1: # %cmpxchg.fencedstore
+; CHECK-P7-NEXT: clrlwi 6, 6, 16
+; CHECK-P7-NEXT: cmplwi 6, 33059
+; CHECK-P7-NEXT: bne 0, .LBB0_4
+; CHECK-P7-NEXT: # %bb.1: # %cmpxchg.fencedstore
; CHECK-P7-NEXT: lis 6, 0
; CHECK-P7-NEXT: li 7, 234
; CHECK-P7-NEXT: sync
; CHECK-P7-NEXT: ori 6, 6, 65535
; CHECK-P7-NEXT: slw 7, 7, 4
; CHECK-P7-NEXT: slw 6, 6, 4
-; CHECK-P7-NEXT: not 6, 6
-; CHECK-P7-NEXT: .p2align 4
-; CHECK-P7-NEXT: .LBB0_2: # %cmpxchg.trystore
-; CHECK-P7-NEXT: # =>This Inner Loop Header: Depth=1
+; CHECK-P7-NEXT: not 6, 6
+; CHECK-P7-NEXT: .p2align 4
+; CHECK-P7-NEXT: .LBB0_2: # %cmpxchg.trystore
+; CHECK-P7-NEXT: #
; CHECK-P7-NEXT: and 5, 5, 6
; CHECK-P7-NEXT: or 5, 5, 7
; CHECK-P7-NEXT: stwcx. 5, 0, 3
-; CHECK-P7-NEXT: beq 0, .LBB0_7
-; CHECK-P7-NEXT: # %bb.3: # %cmpxchg.releasedload
-; CHECK-P7-NEXT: # in Loop: Header=BB0_2 Depth=1
+; CHECK-P7-NEXT: beq 0, .LBB0_7
+; CHECK-P7-NEXT: # %bb.3: # %cmpxchg.releasedload
+; CHECK-P7-NEXT: #
; CHECK-P7-NEXT: lwarx 5, 0, 3
; CHECK-P7-NEXT: srw 8, 5, 4
-; CHECK-P7-NEXT: clrlwi 8, 8, 16
-; CHECK-P7-NEXT: cmplwi 8, 33059
-; CHECK-P7-NEXT: beq 0, .LBB0_2
-; CHECK-P7-NEXT: .LBB0_4: # %cmpxchg.nostore
+; CHECK-P7-NEXT: clrlwi 8, 8, 16
+; CHECK-P7-NEXT: cmplwi 8, 33059
+; CHECK-P7-NEXT: beq 0, .LBB0_2
+; CHECK-P7-NEXT: .LBB0_4: # %cmpxchg.nostore
; CHECK-P7-NEXT: lwsync
; CHECK-P7-NEXT: b .LBB0_8
-; CHECK-P7-NEXT: .LBB0_5: # %L.B0000
+; CHECK-P7-NEXT: .LBB0_5: # %L.B0000
; CHECK-P7-NEXT: lhz 3, 46(1)
-; CHECK-P7-NEXT: cmplwi 3, 234
-; CHECK-P7-NEXT: bne 0, .LBB0_9
-; CHECK-P7-NEXT: # %bb.6: # %L.B0001
+; CHECK-P7-NEXT: cmplwi 3, 234
+; CHECK-P7-NEXT: bne 0, .LBB0_9
+; CHECK-P7-NEXT: # %bb.6: # %L.B0001
; CHECK-P7-NEXT: addis 3, 2, .L_MergedGlobals at toc@ha
; CHECK-P7-NEXT: addi 3, 3, .L_MergedGlobals at toc@l
; CHECK-P7-NEXT: bl puts
; CHECK-P7-NEXT: nop
; CHECK-P7-NEXT: li 3, 0
; CHECK-P7-NEXT: b .LBB0_11
-; CHECK-P7-NEXT: .LBB0_7: # %cmpxchg.success
+; CHECK-P7-NEXT: .LBB0_7: # %cmpxchg.success
; CHECK-P7-NEXT: lwsync
; CHECK-P7-NEXT: b .LBB0_5
-; CHECK-P7-NEXT: .LBB0_8: # %L.B0003
+; CHECK-P7-NEXT: .LBB0_8: # %L.B0003
; CHECK-P7-NEXT: addis 3, 2, .L_MergedGlobals at toc@ha
; CHECK-P7-NEXT: addi 3, 3, .L_MergedGlobals at toc@l
; CHECK-P7-NEXT: addi 3, 3, 16
; CHECK-P7-NEXT: b .LBB0_10
-; CHECK-P7-NEXT: .LBB0_9: # %L.B0005
+; CHECK-P7-NEXT: .LBB0_9: # %L.B0005
; CHECK-P7-NEXT: addis 3, 2, .L_MergedGlobals at toc@ha
; CHECK-P7-NEXT: addi 3, 3, .L_MergedGlobals at toc@l
; CHECK-P7-NEXT: addi 3, 3, 64
-; CHECK-P7-NEXT: .LBB0_10: # %L.B0003
+; CHECK-P7-NEXT: .LBB0_10: # %L.B0003
; CHECK-P7-NEXT: bl puts
; CHECK-P7-NEXT: nop
; CHECK-P7-NEXT: li 3, 1
-; CHECK-P7-NEXT: .LBB0_11: # %L.B0003
+; CHECK-P7-NEXT: .LBB0_11: # %L.B0003
; CHECK-P7-NEXT: addi 1, 1, 48
; CHECK-P7-NEXT: ld 0, 16(1)
; CHECK-P7-NEXT: mtlr 0
diff --git a/llvm/test/CodeGen/PowerPC/all-atomics.ll b/llvm/test/CodeGen/PowerPC/all-atomics.ll
index 67cee358882ff..07afea75aec67 100644
--- a/llvm/test/CodeGen/PowerPC/all-atomics.ll
+++ b/llvm/test/CodeGen/PowerPC/all-atomics.ll
@@ -4336,959 +4336,943 @@ entry:
define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-LABEL: test_compare_and_swap:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addis 4, 2, sc at toc@ha
-; CHECK-NEXT: addis 3, 2, uc at toc@ha
-; CHECK-NEXT: std 27, -40(1) # 8-byte Folded Spill
-; CHECK-NEXT: std 28, -32(1) # 8-byte Folded Spill
-; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
-; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
-; CHECK-NEXT: addi 6, 4, sc at toc@l
-; CHECK-NEXT: lbz 7, uc at toc@l(3)
-; CHECK-NEXT: lbz 8, sc at toc@l(4)
-; CHECK-NEXT: lbarx 5, 0, 6
-; CHECK-NEXT: clrlwi 9, 5, 24
-; CHECK-NEXT: cmplw 9, 7
-; CHECK-NEXT: bne 0, .LBB3_4
-; CHECK-NEXT: # %bb.1: # %cmpxchg.fencedstore276
-; CHECK-NEXT: sync
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_2: # %cmpxchg.trystore275
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stbcx. 8, 0, 6
-; CHECK-NEXT: beq 0, .LBB3_4
-; CHECK-NEXT: # %bb.3: # %cmpxchg.releasedload274
-; CHECK-NEXT: # in Loop: Header=BB3_2 Depth=1
-; CHECK-NEXT: lbarx 5, 0, 6
-; CHECK-NEXT: clrlwi 9, 5, 24
-; CHECK-NEXT: cmplw 9, 7
-; CHECK-NEXT: beq 0, .LBB3_2
-; CHECK-NEXT: .LBB3_4: # %cmpxchg.nostore272
-; CHECK-NEXT: addi 7, 3, uc at toc@l
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: stb 5, sc at toc@l(4)
-; CHECK-NEXT: lbz 9, uc at toc@l(3)
-; CHECK-NEXT: lbarx 8, 0, 7
-; CHECK-NEXT: clrlwi 10, 8, 24
-; CHECK-NEXT: cmplw 10, 9
-; CHECK-NEXT: bne 0, .LBB3_8
-; CHECK-NEXT: # %bb.5: # %cmpxchg.fencedstore257
-; CHECK-NEXT: sync
-; CHECK-NEXT: clrlwi 5, 5, 24
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_6: # %cmpxchg.trystore256
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stbcx. 5, 0, 7
-; CHECK-NEXT: beq 0, .LBB3_8
-; CHECK-NEXT: # %bb.7: # %cmpxchg.releasedload255
-; CHECK-NEXT: # in Loop: Header=BB3_6 Depth=1
-; CHECK-NEXT: lbarx 8, 0, 7
-; CHECK-NEXT: clrlwi 10, 8, 24
-; CHECK-NEXT: cmplw 10, 9
-; CHECK-NEXT: beq 0, .LBB3_6
-; CHECK-NEXT: .LBB3_8: # %cmpxchg.nostore253
-; CHECK-NEXT: addis 5, 2, ss at toc@ha
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: stb 8, uc at toc@l(3)
-; CHECK-NEXT: clrlwi 10, 8, 24
-; CHECK-NEXT: lbz 11, sc at toc@l(4)
-; CHECK-NEXT: addi 8, 5, ss at toc@l
-; CHECK-NEXT: lharx 9, 0, 8
-; CHECK-NEXT: clrlwi 12, 9, 16
-; CHECK-NEXT: cmplw 12, 10
-; CHECK-NEXT: bne 0, .LBB3_12
-; CHECK-NEXT: # %bb.9: # %cmpxchg.fencedstore238
-; CHECK-NEXT: extsb 11, 11
-; CHECK-NEXT: sync
-; CHECK-NEXT: clrlwi 11, 11, 16
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_10: # %cmpxchg.trystore237
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: sthcx. 11, 0, 8
-; CHECK-NEXT: beq 0, .LBB3_12
-; CHECK-NEXT: # %bb.11: # %cmpxchg.releasedload236
-; CHECK-NEXT: # in Loop: Header=BB3_10 Depth=1
-; CHECK-NEXT: lharx 9, 0, 8
-; CHECK-NEXT: clrlwi 12, 9, 16
-; CHECK-NEXT: cmplw 12, 10
-; CHECK-NEXT: beq 0, .LBB3_10
-; CHECK-NEXT: .LBB3_12: # %cmpxchg.nostore234
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: sth 9, ss at toc@l(5)
-; CHECK-NEXT: addis 5, 2, us at toc@ha
-; CHECK-NEXT: lbz 11, uc at toc@l(3)
-; CHECK-NEXT: lbz 12, sc at toc@l(4)
-; CHECK-NEXT: addi 9, 5, us at toc@l
-; CHECK-NEXT: lharx 10, 0, 9
-; CHECK-NEXT: clrlwi 0, 10, 16
-; CHECK-NEXT: cmplw 0, 11
-; CHECK-NEXT: bne 0, .LBB3_16
-; CHECK-NEXT: # %bb.13: # %cmpxchg.fencedstore219
-; CHECK-NEXT: extsb 12, 12
-; CHECK-NEXT: sync
-; CHECK-NEXT: clrlwi 12, 12, 16
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_14: # %cmpxchg.trystore218
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: sthcx. 12, 0, 9
-; CHECK-NEXT: beq 0, .LBB3_16
-; CHECK-NEXT: # %bb.15: # %cmpxchg.releasedload217
-; CHECK-NEXT: # in Loop: Header=BB3_14 Depth=1
-; CHECK-NEXT: lharx 10, 0, 9
-; CHECK-NEXT: clrlwi 0, 10, 16
-; CHECK-NEXT: cmplw 0, 11
-; CHECK-NEXT: beq 0, .LBB3_14
-; CHECK-NEXT: .LBB3_16: # %cmpxchg.nostore215
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: sth 10, us at toc@l(5)
-; CHECK-NEXT: addis 5, 2, si at toc@ha
-; CHECK-NEXT: lbz 12, uc at toc@l(3)
-; CHECK-NEXT: lbz 0, sc at toc@l(4)
-; CHECK-NEXT: addi 10, 5, si at toc@l
-; CHECK-NEXT: lwarx 11, 0, 10
-; CHECK-NEXT: cmplw 11, 12
-; CHECK-NEXT: bne 0, .LBB3_20
-; CHECK-NEXT: # %bb.17: # %cmpxchg.fencedstore200
-; CHECK-NEXT: extsb 0, 0
-; CHECK-NEXT: sync
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_18: # %cmpxchg.trystore199
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stwcx. 0, 0, 10
-; CHECK-NEXT: beq 0, .LBB3_20
-; CHECK-NEXT: # %bb.19: # %cmpxchg.releasedload198
-; CHECK-NEXT: # in Loop: Header=BB3_18 Depth=1
-; CHECK-NEXT: lwarx 11, 0, 10
-; CHECK-NEXT: cmplw 11, 12
-; CHECK-NEXT: beq 0, .LBB3_18
-; CHECK-NEXT: .LBB3_20: # %cmpxchg.nostore196
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: stw 11, si at toc@l(5)
-; CHECK-NEXT: addis 5, 2, ui at toc@ha
-; CHECK-NEXT: lbz 0, uc at toc@l(3)
-; CHECK-NEXT: lbz 30, sc at toc@l(4)
-; CHECK-NEXT: addi 11, 5, ui at toc@l
-; CHECK-NEXT: lwarx 12, 0, 11
-; CHECK-NEXT: cmplw 12, 0
-; CHECK-NEXT: bne 0, .LBB3_24
-; CHECK-NEXT: # %bb.21: # %cmpxchg.fencedstore181
-; CHECK-NEXT: extsb 30, 30
-; CHECK-NEXT: sync
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_22: # %cmpxchg.trystore180
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stwcx. 30, 0, 11
-; CHECK-NEXT: beq 0, .LBB3_24
-; CHECK-NEXT: # %bb.23: # %cmpxchg.releasedload179
-; CHECK-NEXT: # in Loop: Header=BB3_22 Depth=1
-; CHECK-NEXT: lwarx 12, 0, 11
-; CHECK-NEXT: cmplw 12, 0
-; CHECK-NEXT: beq 0, .LBB3_22
-; CHECK-NEXT: .LBB3_24: # %cmpxchg.nostore177
-; CHECK-NEXT: addis 30, 2, sll at toc@ha
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: stw 12, ui at toc@l(5)
-; CHECK-NEXT: lbz 29, uc at toc@l(3)
-; CHECK-NEXT: lbz 28, sc at toc@l(4)
-; CHECK-NEXT: addi 12, 30, sll at toc@l
-; CHECK-NEXT: ldarx 0, 0, 12
-; CHECK-NEXT: cmpld 0, 29
-; CHECK-NEXT: bne 0, .LBB3_28
-; CHECK-NEXT: # %bb.25: # %cmpxchg.fencedstore162
-; CHECK-NEXT: extsb 28, 28
-; CHECK-NEXT: sync
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_26: # %cmpxchg.trystore161
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stdcx. 28, 0, 12
-; CHECK-NEXT: beq 0, .LBB3_28
-; CHECK-NEXT: # %bb.27: # %cmpxchg.releasedload160
-; CHECK-NEXT: # in Loop: Header=BB3_26 Depth=1
-; CHECK-NEXT: ldarx 0, 0, 12
-; CHECK-NEXT: cmpld 0, 29
-; CHECK-NEXT: beq 0, .LBB3_26
-; CHECK-NEXT: .LBB3_28: # %cmpxchg.nostore158
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: std 0, sll at toc@l(30)
-; CHECK-NEXT: addis 30, 2, ull at toc@ha
-; CHECK-NEXT: lbz 28, uc at toc@l(3)
-; CHECK-NEXT: lbz 27, sc at toc@l(4)
-; CHECK-NEXT: addi 0, 30, ull at toc@l
-; CHECK-NEXT: ldarx 29, 0, 0
-; CHECK-NEXT: cmpld 29, 28
-; CHECK-NEXT: bne 0, .LBB3_32
-; CHECK-NEXT: # %bb.29: # %cmpxchg.fencedstore143
-; CHECK-NEXT: extsb 27, 27
-; CHECK-NEXT: sync
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_30: # %cmpxchg.trystore142
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stdcx. 27, 0, 0
-; CHECK-NEXT: beq 0, .LBB3_32
-; CHECK-NEXT: # %bb.31: # %cmpxchg.releasedload141
-; CHECK-NEXT: # in Loop: Header=BB3_30 Depth=1
-; CHECK-NEXT: ldarx 29, 0, 0
-; CHECK-NEXT: cmpld 29, 28
-; CHECK-NEXT: beq 0, .LBB3_30
-; CHECK-NEXT: .LBB3_32: # %cmpxchg.nostore139
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: std 29, ull at toc@l(30)
-; CHECK-NEXT: lbz 30, uc at toc@l(3)
-; CHECK-NEXT: lbz 29, sc at toc@l(4)
-; CHECK-NEXT: lbarx 28, 0, 6
-; CHECK-NEXT: clrlwi 28, 28, 24
-; CHECK-NEXT: cmplw 28, 30
-; CHECK-NEXT: bne 0, .LBB3_36
-; CHECK-NEXT: # %bb.33: # %cmpxchg.fencedstore124
-; CHECK-NEXT: sync
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_34: # %cmpxchg.trystore123
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stbcx. 29, 0, 6
-; CHECK-NEXT: beq 0, .LBB3_37
-; CHECK-NEXT: # %bb.35: # %cmpxchg.releasedload122
-; CHECK-NEXT: # in Loop: Header=BB3_34 Depth=1
-; CHECK-NEXT: lbarx 28, 0, 6
-; CHECK-NEXT: clrlwi 28, 28, 24
-; CHECK-NEXT: cmplw 28, 30
-; CHECK-NEXT: beq 0, .LBB3_34
-; CHECK-NEXT: .LBB3_36: # %cmpxchg.nostore120
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: crxor 20, 20, 20
-; CHECK-NEXT: b .LBB3_38
-; CHECK-NEXT: .LBB3_37: # %cmpxchg.success121
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: creqv 20, 20, 20
-; CHECK-NEXT: .LBB3_38: # %cmpxchg.end118
-; CHECK-NEXT: li 6, 0
-; CHECK-NEXT: li 30, 1
-; CHECK-NEXT: isel 6, 30, 6, 20
-; CHECK-NEXT: lbz 30, sc at toc@l(4)
-; CHECK-NEXT: stw 6, ui at toc@l(5)
-; CHECK-NEXT: lbz 6, uc at toc@l(3)
-; CHECK-NEXT: lbarx 29, 0, 7
-; CHECK-NEXT: clrlwi 29, 29, 24
-; CHECK-NEXT: cmplw 29, 6
-; CHECK-NEXT: bne 0, .LBB3_42
-; CHECK-NEXT: # %bb.39: # %cmpxchg.fencedstore105
-; CHECK-NEXT: sync
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_40: # %cmpxchg.trystore104
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stbcx. 30, 0, 7
-; CHECK-NEXT: beq 0, .LBB3_43
-; CHECK-NEXT: # %bb.41: # %cmpxchg.releasedload103
-; CHECK-NEXT: # in Loop: Header=BB3_40 Depth=1
-; CHECK-NEXT: lbarx 29, 0, 7
-; CHECK-NEXT: clrlwi 29, 29, 24
-; CHECK-NEXT: cmplw 29, 6
-; CHECK-NEXT: beq 0, .LBB3_40
-; CHECK-NEXT: .LBB3_42: # %cmpxchg.nostore101
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: crxor 20, 20, 20
-; CHECK-NEXT: b .LBB3_44
-; CHECK-NEXT: .LBB3_43: # %cmpxchg.success102
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: creqv 20, 20, 20
-; CHECK-NEXT: .LBB3_44: # %cmpxchg.end99
-; CHECK-NEXT: li 6, 0
-; CHECK-NEXT: li 7, 1
-; CHECK-NEXT: isel 6, 7, 6, 20
-; CHECK-NEXT: lbz 7, sc at toc@l(4)
-; CHECK-NEXT: stw 6, ui at toc@l(5)
-; CHECK-NEXT: lbz 6, uc at toc@l(3)
-; CHECK-NEXT: lharx 30, 0, 8
-; CHECK-NEXT: clrlwi 30, 30, 16
-; CHECK-NEXT: cmplw 30, 6
-; CHECK-NEXT: bne 0, .LBB3_48
-; CHECK-NEXT: # %bb.45: # %cmpxchg.fencedstore86
-; CHECK-NEXT: extsb 7, 7
-; CHECK-NEXT: sync
-; CHECK-NEXT: clrlwi 7, 7, 16
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_46: # %cmpxchg.trystore85
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: sthcx. 7, 0, 8
-; CHECK-NEXT: beq 0, .LBB3_49
-; CHECK-NEXT: # %bb.47: # %cmpxchg.releasedload84
-; CHECK-NEXT: # in Loop: Header=BB3_46 Depth=1
-; CHECK-NEXT: lharx 30, 0, 8
-; CHECK-NEXT: clrlwi 30, 30, 16
-; CHECK-NEXT: cmplw 30, 6
-; CHECK-NEXT: beq 0, .LBB3_46
-; CHECK-NEXT: .LBB3_48: # %cmpxchg.nostore82
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: crxor 20, 20, 20
-; CHECK-NEXT: b .LBB3_50
-; CHECK-NEXT: .LBB3_49: # %cmpxchg.success83
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: creqv 20, 20, 20
-; CHECK-NEXT: .LBB3_50: # %cmpxchg.end80
-; CHECK-NEXT: li 6, 0
-; CHECK-NEXT: li 7, 1
-; CHECK-NEXT: isel 6, 7, 6, 20
-; CHECK-NEXT: lbz 7, sc at toc@l(4)
-; CHECK-NEXT: stw 6, ui at toc@l(5)
-; CHECK-NEXT: lbz 6, uc at toc@l(3)
-; CHECK-NEXT: lharx 8, 0, 9
-; CHECK-NEXT: clrlwi 8, 8, 16
-; CHECK-NEXT: cmplw 8, 6
-; CHECK-NEXT: bne 0, .LBB3_54
-; CHECK-NEXT: # %bb.51: # %cmpxchg.fencedstore67
-; CHECK-NEXT: extsb 7, 7
-; CHECK-NEXT: sync
-; CHECK-NEXT: clrlwi 7, 7, 16
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_52: # %cmpxchg.trystore66
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: sthcx. 7, 0, 9
-; CHECK-NEXT: beq 0, .LBB3_55
-; CHECK-NEXT: # %bb.53: # %cmpxchg.releasedload65
-; CHECK-NEXT: # in Loop: Header=BB3_52 Depth=1
-; CHECK-NEXT: lharx 8, 0, 9
-; CHECK-NEXT: clrlwi 8, 8, 16
-; CHECK-NEXT: cmplw 8, 6
-; CHECK-NEXT: beq 0, .LBB3_52
-; CHECK-NEXT: .LBB3_54: # %cmpxchg.nostore63
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: crxor 20, 20, 20
-; CHECK-NEXT: b .LBB3_56
-; CHECK-NEXT: .LBB3_55: # %cmpxchg.success64
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: creqv 20, 20, 20
-; CHECK-NEXT: .LBB3_56: # %cmpxchg.end61
-; CHECK-NEXT: li 6, 0
-; CHECK-NEXT: li 7, 1
-; CHECK-NEXT: isel 6, 7, 6, 20
-; CHECK-NEXT: lbz 7, sc at toc@l(4)
-; CHECK-NEXT: stw 6, ui at toc@l(5)
-; CHECK-NEXT: lbz 6, uc at toc@l(3)
-; CHECK-NEXT: lwarx 8, 0, 10
-; CHECK-NEXT: cmplw 8, 6
-; CHECK-NEXT: bne 0, .LBB3_60
-; CHECK-NEXT: # %bb.57: # %cmpxchg.fencedstore48
-; CHECK-NEXT: extsb 7, 7
-; CHECK-NEXT: sync
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_58: # %cmpxchg.trystore47
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stwcx. 7, 0, 10
-; CHECK-NEXT: beq 0, .LBB3_61
-; CHECK-NEXT: # %bb.59: # %cmpxchg.releasedload46
-; CHECK-NEXT: # in Loop: Header=BB3_58 Depth=1
-; CHECK-NEXT: lwarx 8, 0, 10
-; CHECK-NEXT: cmplw 8, 6
-; CHECK-NEXT: beq 0, .LBB3_58
-; CHECK-NEXT: .LBB3_60: # %cmpxchg.nostore44
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: crxor 20, 20, 20
-; CHECK-NEXT: b .LBB3_62
-; CHECK-NEXT: .LBB3_61: # %cmpxchg.success45
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: creqv 20, 20, 20
-; CHECK-NEXT: .LBB3_62: # %cmpxchg.end42
-; CHECK-NEXT: li 6, 0
-; CHECK-NEXT: li 7, 1
-; CHECK-NEXT: isel 6, 7, 6, 20
-; CHECK-NEXT: lbz 7, sc at toc@l(4)
-; CHECK-NEXT: stw 6, ui at toc@l(5)
-; CHECK-NEXT: lbz 6, uc at toc@l(3)
-; CHECK-NEXT: lwarx 8, 0, 11
-; CHECK-NEXT: cmplw 8, 6
-; CHECK-NEXT: bne 0, .LBB3_66
-; CHECK-NEXT: # %bb.63: # %cmpxchg.fencedstore29
-; CHECK-NEXT: extsb 7, 7
-; CHECK-NEXT: sync
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_64: # %cmpxchg.trystore28
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stwcx. 7, 0, 11
-; CHECK-NEXT: beq 0, .LBB3_67
-; CHECK-NEXT: # %bb.65: # %cmpxchg.releasedload27
-; CHECK-NEXT: # in Loop: Header=BB3_64 Depth=1
-; CHECK-NEXT: lwarx 8, 0, 11
-; CHECK-NEXT: cmplw 8, 6
-; CHECK-NEXT: beq 0, .LBB3_64
-; CHECK-NEXT: .LBB3_66: # %cmpxchg.nostore25
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: crxor 20, 20, 20
-; CHECK-NEXT: b .LBB3_68
-; CHECK-NEXT: .LBB3_67: # %cmpxchg.success26
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: creqv 20, 20, 20
-; CHECK-NEXT: .LBB3_68: # %cmpxchg.end23
-; CHECK-NEXT: li 6, 0
-; CHECK-NEXT: li 7, 1
-; CHECK-NEXT: isel 6, 7, 6, 20
-; CHECK-NEXT: lbz 7, sc at toc@l(4)
-; CHECK-NEXT: stw 6, ui at toc@l(5)
-; CHECK-NEXT: lbz 6, uc at toc@l(3)
-; CHECK-NEXT: ldarx 8, 0, 12
-; CHECK-NEXT: cmpld 8, 6
-; CHECK-NEXT: bne 0, .LBB3_72
-; CHECK-NEXT: # %bb.69: # %cmpxchg.fencedstore10
-; CHECK-NEXT: extsb 7, 7
-; CHECK-NEXT: sync
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_70: # %cmpxchg.trystore9
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stdcx. 7, 0, 12
-; CHECK-NEXT: beq 0, .LBB3_73
-; CHECK-NEXT: # %bb.71: # %cmpxchg.releasedload8
-; CHECK-NEXT: # in Loop: Header=BB3_70 Depth=1
-; CHECK-NEXT: ldarx 8, 0, 12
-; CHECK-NEXT: cmpld 8, 6
-; CHECK-NEXT: beq 0, .LBB3_70
-; CHECK-NEXT: .LBB3_72: # %cmpxchg.nostore6
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: crxor 20, 20, 20
-; CHECK-NEXT: b .LBB3_74
-; CHECK-NEXT: .LBB3_73: # %cmpxchg.success7
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: creqv 20, 20, 20
-; CHECK-NEXT: .LBB3_74: # %cmpxchg.end4
-; CHECK-NEXT: li 6, 0
-; CHECK-NEXT: li 7, 1
-; CHECK-NEXT: lbz 3, uc at toc@l(3)
-; CHECK-NEXT: lbz 4, sc at toc@l(4)
-; CHECK-NEXT: isel 6, 7, 6, 20
-; CHECK-NEXT: stw 6, ui at toc@l(5)
-; CHECK-NEXT: ldarx 6, 0, 0
-; CHECK-NEXT: cmpld 6, 3
-; CHECK-NEXT: bne 0, .LBB3_78
-; CHECK-NEXT: # %bb.75: # %cmpxchg.fencedstore
-; CHECK-NEXT: extsb 4, 4
-; CHECK-NEXT: sync
-; CHECK-NEXT: .p2align 5
-; CHECK-NEXT: .LBB3_76: # %cmpxchg.trystore
-; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: stdcx. 4, 0, 0
-; CHECK-NEXT: beq 0, .LBB3_79
-; CHECK-NEXT: # %bb.77: # %cmpxchg.releasedload
-; CHECK-NEXT: # in Loop: Header=BB3_76 Depth=1
-; CHECK-NEXT: ldarx 6, 0, 0
-; CHECK-NEXT: cmpld 6, 3
-; CHECK-NEXT: beq 0, .LBB3_76
-; CHECK-NEXT: .LBB3_78: # %cmpxchg.nostore
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: crxor 20, 20, 20
-; CHECK-NEXT: b .LBB3_80
-; CHECK-NEXT: .LBB3_79: # %cmpxchg.success
-; CHECK-NEXT: lwsync
-; CHECK-NEXT: creqv 20, 20, 20
-; CHECK-NEXT: .LBB3_80: # %cmpxchg.end
-; CHECK-NEXT: li 3, 0
-; CHECK-NEXT: li 4, 1
-; CHECK-NEXT: ld 30, -16(1) # 8-byte Folded Reload
-; CHECK-NEXT: ld 29, -24(1) # 8-byte Folded Reload
-; CHECK-NEXT: ld 28, -32(1) # 8-byte Folded Reload
-; CHECK-NEXT: ld 27, -40(1) # 8-byte Folded Reload
-; CHECK-NEXT: isel 3, 4, 3, 20
-; CHECK-NEXT: stw 3, ui at toc@l(5)
-; CHECK-NEXT: blr
+; CHECK-NEXT: addis 4, 2, sc at toc@ha
+; CHECK-NEXT: addis 3, 2, uc at toc@ha
+; CHECK-NEXT: std 27, -40(1) # 8-byte Folded Spill
+; CHECK-NEXT: std 28, -32(1) # 8-byte Folded Spill
+; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
+; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
+; CHECK-NEXT: addi 6, 4, sc at toc@l
+; CHECK-NEXT: lbz 7, uc at toc@l(3)
+; CHECK-NEXT: lbz 8, sc at toc@l(4)
+; CHECK-NEXT: lbarx 5, 0, 6
+; CHECK-NEXT: cmplw 5, 7
+; CHECK-NEXT: bne 0, .LBB3_4
+; CHECK-NEXT: # %bb.1: # %cmpxchg.fencedstore276
+; CHECK-NEXT: sync
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_2: # %cmpxchg.trystore275
+; CHECK-NEXT: #
+; CHECK-NEXT: stbcx. 8, 0, 6
+; CHECK-NEXT: beq 0, .LBB3_4
+; CHECK-NEXT: # %bb.3: # %cmpxchg.releasedload274
+; CHECK-NEXT: #
+; CHECK-NEXT: lbarx 5, 0, 6
+; CHECK-NEXT: cmplw 5, 7
+; CHECK-NEXT: beq 0, .LBB3_2
+; CHECK-NEXT: .LBB3_4: # %cmpxchg.nostore272
+; CHECK-NEXT: addi 7, 3, uc at toc@l
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: stb 5, sc at toc@l(4)
+; CHECK-NEXT: lbz 9, uc at toc@l(3)
+; CHECK-NEXT: lbarx 8, 0, 7
+; CHECK-NEXT: cmplw 8, 9
+; CHECK-NEXT: bne 0, .LBB3_8
+; CHECK-NEXT: # %bb.5: # %cmpxchg.fencedstore257
+; CHECK-NEXT: sync
+; CHECK-NEXT: clrlwi 5, 5, 24
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_6: # %cmpxchg.trystore256
+; CHECK-NEXT: #
+; CHECK-NEXT: stbcx. 5, 0, 7
+; CHECK-NEXT: beq 0, .LBB3_8
+; CHECK-NEXT: # %bb.7: # %cmpxchg.releasedload255
+; CHECK-NEXT: #
+; CHECK-NEXT: lbarx 8, 0, 7
+; CHECK-NEXT: cmplw 8, 9
+; CHECK-NEXT: beq 0, .LBB3_6
+; CHECK-NEXT: .LBB3_8: # %cmpxchg.nostore253
+; CHECK-NEXT: addis 5, 2, ss at toc@ha
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: stb 8, uc at toc@l(3)
+; CHECK-NEXT: clrlwi 10, 8, 24
+; CHECK-NEXT: lbz 11, sc at toc@l(4)
+; CHECK-NEXT: addi 8, 5, ss at toc@l
+; CHECK-NEXT: lharx 9, 0, 8
+; CHECK-NEXT: cmplw 9, 10
+; CHECK-NEXT: bne 0, .LBB3_12
+; CHECK-NEXT: # %bb.9: # %cmpxchg.fencedstore238
+; CHECK-NEXT: extsb 11, 11
+; CHECK-NEXT: sync
+; CHECK-NEXT: clrlwi 11, 11, 16
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_10: # %cmpxchg.trystore237
+; CHECK-NEXT: #
+; CHECK-NEXT: sthcx. 11, 0, 8
+; CHECK-NEXT: beq 0, .LBB3_12
+; CHECK-NEXT: # %bb.11: # %cmpxchg.releasedload236
+; CHECK-NEXT: #
+; CHECK-NEXT: lharx 9, 0, 8
+; CHECK-NEXT: cmplw 9, 10
+; CHECK-NEXT: beq 0, .LBB3_10
+; CHECK-NEXT: .LBB3_12: # %cmpxchg.nostore234
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: sth 9, ss at toc@l(5)
+; CHECK-NEXT: addis 5, 2, us at toc@ha
+; CHECK-NEXT: lbz 11, uc at toc@l(3)
+; CHECK-NEXT: lbz 12, sc at toc@l(4)
+; CHECK-NEXT: addi 9, 5, us at toc@l
+; CHECK-NEXT: lharx 10, 0, 9
+; CHECK-NEXT: cmplw 10, 11
+; CHECK-NEXT: bne 0, .LBB3_16
+; CHECK-NEXT: # %bb.13: # %cmpxchg.fencedstore219
+; CHECK-NEXT: extsb 12, 12
+; CHECK-NEXT: sync
+; CHECK-NEXT: clrlwi 12, 12, 16
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_14: # %cmpxchg.trystore218
+; CHECK-NEXT: #
+; CHECK-NEXT: sthcx. 12, 0, 9
+; CHECK-NEXT: beq 0, .LBB3_16
+; CHECK-NEXT: # %bb.15: # %cmpxchg.releasedload217
+; CHECK-NEXT: #
+; CHECK-NEXT: lharx 10, 0, 9
+; CHECK-NEXT: cmplw 10, 11
+; CHECK-NEXT: beq 0, .LBB3_14
+; CHECK-NEXT: .LBB3_16: # %cmpxchg.nostore215
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: sth 10, us at toc@l(5)
+; CHECK-NEXT: addis 5, 2, si at toc@ha
+; CHECK-NEXT: lbz 12, uc at toc@l(3)
+; CHECK-NEXT: lbz 0, sc at toc@l(4)
+; CHECK-NEXT: addi 10, 5, si at toc@l
+; CHECK-NEXT: lwarx 11, 0, 10
+; CHECK-NEXT: cmplw 11, 12
+; CHECK-NEXT: bne 0, .LBB3_20
+; CHECK-NEXT: # %bb.17: # %cmpxchg.fencedstore200
+; CHECK-NEXT: extsb 0, 0
+; CHECK-NEXT: sync
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_18: # %cmpxchg.trystore199
+; CHECK-NEXT: #
+; CHECK-NEXT: stwcx. 0, 0, 10
+; CHECK-NEXT: beq 0, .LBB3_20
+; CHECK-NEXT: # %bb.19: # %cmpxchg.releasedload198
+; CHECK-NEXT: #
+; CHECK-NEXT: lwarx 11, 0, 10
+; CHECK-NEXT: cmplw 11, 12
+; CHECK-NEXT: beq 0, .LBB3_18
+; CHECK-NEXT: .LBB3_20: # %cmpxchg.nostore196
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: stw 11, si at toc@l(5)
+; CHECK-NEXT: addis 5, 2, ui at toc@ha
+; CHECK-NEXT: lbz 0, uc at toc@l(3)
+; CHECK-NEXT: lbz 30, sc at toc@l(4)
+; CHECK-NEXT: addi 11, 5, ui at toc@l
+; CHECK-NEXT: lwarx 12, 0, 11
+; CHECK-NEXT: cmplw 12, 0
+; CHECK-NEXT: bne 0, .LBB3_24
+; CHECK-NEXT: # %bb.21: # %cmpxchg.fencedstore181
+; CHECK-NEXT: extsb 30, 30
+; CHECK-NEXT: sync
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_22: # %cmpxchg.trystore180
+; CHECK-NEXT: #
+; CHECK-NEXT: stwcx. 30, 0, 11
+; CHECK-NEXT: beq 0, .LBB3_24
+; CHECK-NEXT: # %bb.23: # %cmpxchg.releasedload179
+; CHECK-NEXT: #
+; CHECK-NEXT: lwarx 12, 0, 11
+; CHECK-NEXT: cmplw 12, 0
+; CHECK-NEXT: beq 0, .LBB3_22
+; CHECK-NEXT: .LBB3_24: # %cmpxchg.nostore177
+; CHECK-NEXT: addis 30, 2, sll at toc@ha
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: stw 12, ui at toc@l(5)
+; CHECK-NEXT: lbz 29, uc at toc@l(3)
+; CHECK-NEXT: lbz 28, sc at toc@l(4)
+; CHECK-NEXT: addi 12, 30, sll at toc@l
+; CHECK-NEXT: ldarx 0, 0, 12
+; CHECK-NEXT: cmpld 0, 29
+; CHECK-NEXT: bne 0, .LBB3_28
+; CHECK-NEXT: # %bb.25: # %cmpxchg.fencedstore162
+; CHECK-NEXT: extsb 28, 28
+; CHECK-NEXT: sync
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_26: # %cmpxchg.trystore161
+; CHECK-NEXT: #
+; CHECK-NEXT: stdcx. 28, 0, 12
+; CHECK-NEXT: beq 0, .LBB3_28
+; CHECK-NEXT: # %bb.27: # %cmpxchg.releasedload160
+; CHECK-NEXT: #
+; CHECK-NEXT: ldarx 0, 0, 12
+; CHECK-NEXT: cmpld 0, 29
+; CHECK-NEXT: beq 0, .LBB3_26
+; CHECK-NEXT: .LBB3_28: # %cmpxchg.nostore158
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: std 0, sll at toc@l(30)
+; CHECK-NEXT: addis 30, 2, ull at toc@ha
+; CHECK-NEXT: lbz 28, uc at toc@l(3)
+; CHECK-NEXT: lbz 27, sc at toc@l(4)
+; CHECK-NEXT: addi 0, 30, ull at toc@l
+; CHECK-NEXT: ldarx 29, 0, 0
+; CHECK-NEXT: cmpld 29, 28
+; CHECK-NEXT: bne 0, .LBB3_32
+; CHECK-NEXT: # %bb.29: # %cmpxchg.fencedstore143
+; CHECK-NEXT: extsb 27, 27
+; CHECK-NEXT: sync
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_30: # %cmpxchg.trystore142
+; CHECK-NEXT: #
+; CHECK-NEXT: stdcx. 27, 0, 0
+; CHECK-NEXT: beq 0, .LBB3_32
+; CHECK-NEXT: # %bb.31: # %cmpxchg.releasedload141
+; CHECK-NEXT: #
+; CHECK-NEXT: ldarx 29, 0, 0
+; CHECK-NEXT: cmpld 29, 28
+; CHECK-NEXT: beq 0, .LBB3_30
+; CHECK-NEXT: .LBB3_32: # %cmpxchg.nostore139
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: std 29, ull at toc@l(30)
+; CHECK-NEXT: lbz 30, uc at toc@l(3)
+; CHECK-NEXT: lbz 29, sc at toc@l(4)
+; CHECK-NEXT: lbarx 28, 0, 6
+; CHECK-NEXT: cmplw 28, 30
+; CHECK-NEXT: bne 0, .LBB3_36
+; CHECK-NEXT: # %bb.33: # %cmpxchg.fencedstore124
+; CHECK-NEXT: sync
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_34: # %cmpxchg.trystore123
+; CHECK-NEXT: #
+; CHECK-NEXT: stbcx. 29, 0, 6
+; CHECK-NEXT: beq 0, .LBB3_37
+; CHECK-NEXT: # %bb.35: # %cmpxchg.releasedload122
+; CHECK-NEXT: #
+; CHECK-NEXT: lbarx 28, 0, 6
+; CHECK-NEXT: cmplw 28, 30
+; CHECK-NEXT: beq 0, .LBB3_34
+; CHECK-NEXT: .LBB3_36: # %cmpxchg.nostore120
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: crxor 20, 20, 20
+; CHECK-NEXT: b .LBB3_38
+; CHECK-NEXT: .LBB3_37: # %cmpxchg.success121
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: creqv 20, 20, 20
+; CHECK-NEXT: .LBB3_38: # %cmpxchg.end118
+; CHECK-NEXT: li 6, 0
+; CHECK-NEXT: li 30, 1
+; CHECK-NEXT: isel 6, 30, 6, 20
+; CHECK-NEXT: lbz 30, sc at toc@l(4)
+; CHECK-NEXT: stw 6, ui at toc@l(5)
+; CHECK-NEXT: lbz 6, uc at toc@l(3)
+; CHECK-NEXT: lbarx 29, 0, 7
+; CHECK-NEXT: cmplw 29, 6
+; CHECK-NEXT: bne 0, .LBB3_42
+; CHECK-NEXT: # %bb.39: # %cmpxchg.fencedstore105
+; CHECK-NEXT: sync
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_40: # %cmpxchg.trystore104
+; CHECK-NEXT: #
+; CHECK-NEXT: stbcx. 30, 0, 7
+; CHECK-NEXT: beq 0, .LBB3_43
+; CHECK-NEXT: # %bb.41: # %cmpxchg.releasedload103
+; CHECK-NEXT: #
+; CHECK-NEXT: lbarx 29, 0, 7
+; CHECK-NEXT: cmplw 29, 6
+; CHECK-NEXT: beq 0, .LBB3_40
+; CHECK-NEXT: .LBB3_42: # %cmpxchg.nostore101
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: crxor 20, 20, 20
+; CHECK-NEXT: b .LBB3_44
+; CHECK-NEXT: .LBB3_43: # %cmpxchg.success102
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: creqv 20, 20, 20
+; CHECK-NEXT: .LBB3_44: # %cmpxchg.end99
+; CHECK-NEXT: li 6, 0
+; CHECK-NEXT: li 7, 1
+; CHECK-NEXT: isel 6, 7, 6, 20
+; CHECK-NEXT: lbz 7, sc at toc@l(4)
+; CHECK-NEXT: stw 6, ui at toc@l(5)
+; CHECK-NEXT: lbz 6, uc at toc@l(3)
+; CHECK-NEXT: lharx 30, 0, 8
+; CHECK-NEXT: cmplw 30, 6
+; CHECK-NEXT: bne 0, .LBB3_48
+; CHECK-NEXT: # %bb.45: # %cmpxchg.fencedstore86
+; CHECK-NEXT: extsb 7, 7
+; CHECK-NEXT: sync
+; CHECK-NEXT: clrlwi 7, 7, 16
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_46: # %cmpxchg.trystore85
+; CHECK-NEXT: #
+; CHECK-NEXT: sthcx. 7, 0, 8
+; CHECK-NEXT: beq 0, .LBB3_49
+; CHECK-NEXT: # %bb.47: # %cmpxchg.releasedload84
+; CHECK-NEXT: #
+; CHECK-NEXT: lharx 30, 0, 8
+; CHECK-NEXT: cmplw 30, 6
+; CHECK-NEXT: beq 0, .LBB3_46
+; CHECK-NEXT: .LBB3_48: # %cmpxchg.nostore82
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: crxor 20, 20, 20
+; CHECK-NEXT: b .LBB3_50
+; CHECK-NEXT: .LBB3_49: # %cmpxchg.success83
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: creqv 20, 20, 20
+; CHECK-NEXT: .LBB3_50: # %cmpxchg.end80
+; CHECK-NEXT: li 6, 0
+; CHECK-NEXT: li 7, 1
+; CHECK-NEXT: isel 6, 7, 6, 20
+; CHECK-NEXT: lbz 7, sc at toc@l(4)
+; CHECK-NEXT: stw 6, ui at toc@l(5)
+; CHECK-NEXT: lbz 6, uc at toc@l(3)
+; CHECK-NEXT: lharx 8, 0, 9
+; CHECK-NEXT: cmplw 8, 6
+; CHECK-NEXT: bne 0, .LBB3_54
+; CHECK-NEXT: # %bb.51: # %cmpxchg.fencedstore67
+; CHECK-NEXT: extsb 7, 7
+; CHECK-NEXT: sync
+; CHECK-NEXT: clrlwi 7, 7, 16
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_52: # %cmpxchg.trystore66
+; CHECK-NEXT: #
+; CHECK-NEXT: sthcx. 7, 0, 9
+; CHECK-NEXT: beq 0, .LBB3_55
+; CHECK-NEXT: # %bb.53: # %cmpxchg.releasedload65
+; CHECK-NEXT: #
+; CHECK-NEXT: lharx 8, 0, 9
+; CHECK-NEXT: cmplw 8, 6
+; CHECK-NEXT: beq 0, .LBB3_52
+; CHECK-NEXT: .LBB3_54: # %cmpxchg.nostore63
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: crxor 20, 20, 20
+; CHECK-NEXT: b .LBB3_56
+; CHECK-NEXT: .LBB3_55: # %cmpxchg.success64
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: creqv 20, 20, 20
+; CHECK-NEXT: .LBB3_56: # %cmpxchg.end61
+; CHECK-NEXT: li 6, 0
+; CHECK-NEXT: li 7, 1
+; CHECK-NEXT: isel 6, 7, 6, 20
+; CHECK-NEXT: lbz 7, sc at toc@l(4)
+; CHECK-NEXT: stw 6, ui at toc@l(5)
+; CHECK-NEXT: lbz 6, uc at toc@l(3)
+; CHECK-NEXT: lwarx 8, 0, 10
+; CHECK-NEXT: cmplw 8, 6
+; CHECK-NEXT: bne 0, .LBB3_60
+; CHECK-NEXT: # %bb.57: # %cmpxchg.fencedstore48
+; CHECK-NEXT: extsb 7, 7
+; CHECK-NEXT: sync
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_58: # %cmpxchg.trystore47
+; CHECK-NEXT: #
+; CHECK-NEXT: stwcx. 7, 0, 10
+; CHECK-NEXT: beq 0, .LBB3_61
+; CHECK-NEXT: # %bb.59: # %cmpxchg.releasedload46
+; CHECK-NEXT: #
+; CHECK-NEXT: lwarx 8, 0, 10
+; CHECK-NEXT: cmplw 8, 6
+; CHECK-NEXT: beq 0, .LBB3_58
+; CHECK-NEXT: .LBB3_60: # %cmpxchg.nostore44
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: crxor 20, 20, 20
+; CHECK-NEXT: b .LBB3_62
+; CHECK-NEXT: .LBB3_61: # %cmpxchg.success45
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: creqv 20, 20, 20
+; CHECK-NEXT: .LBB3_62: # %cmpxchg.end42
+; CHECK-NEXT: li 6, 0
+; CHECK-NEXT: li 7, 1
+; CHECK-NEXT: isel 6, 7, 6, 20
+; CHECK-NEXT: lbz 7, sc at toc@l(4)
+; CHECK-NEXT: stw 6, ui at toc@l(5)
+; CHECK-NEXT: lbz 6, uc at toc@l(3)
+; CHECK-NEXT: lwarx 8, 0, 11
+; CHECK-NEXT: cmplw 8, 6
+; CHECK-NEXT: bne 0, .LBB3_66
+; CHECK-NEXT: # %bb.63: # %cmpxchg.fencedstore29
+; CHECK-NEXT: extsb 7, 7
+; CHECK-NEXT: sync
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_64: # %cmpxchg.trystore28
+; CHECK-NEXT: #
+; CHECK-NEXT: stwcx. 7, 0, 11
+; CHECK-NEXT: beq 0, .LBB3_67
+; CHECK-NEXT: # %bb.65: # %cmpxchg.releasedload27
+; CHECK-NEXT: #
+; CHECK-NEXT: lwarx 8, 0, 11
+; CHECK-NEXT: cmplw 8, 6
+; CHECK-NEXT: beq 0, .LBB3_64
+; CHECK-NEXT: .LBB3_66: # %cmpxchg.nostore25
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: crxor 20, 20, 20
+; CHECK-NEXT: b .LBB3_68
+; CHECK-NEXT: .LBB3_67: # %cmpxchg.success26
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: creqv 20, 20, 20
+; CHECK-NEXT: .LBB3_68: # %cmpxchg.end23
+; CHECK-NEXT: li 6, 0
+; CHECK-NEXT: li 7, 1
+; CHECK-NEXT: isel 6, 7, 6, 20
+; CHECK-NEXT: lbz 7, sc at toc@l(4)
+; CHECK-NEXT: stw 6, ui at toc@l(5)
+; CHECK-NEXT: lbz 6, uc at toc@l(3)
+; CHECK-NEXT: ldarx 8, 0, 12
+; CHECK-NEXT: cmpld 8, 6
+; CHECK-NEXT: bne 0, .LBB3_72
+; CHECK-NEXT: # %bb.69: # %cmpxchg.fencedstore10
+; CHECK-NEXT: extsb 7, 7
+; CHECK-NEXT: sync
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_70: # %cmpxchg.trystore9
+; CHECK-NEXT: #
+; CHECK-NEXT: stdcx. 7, 0, 12
+; CHECK-NEXT: beq 0, .LBB3_73
+; CHECK-NEXT: # %bb.71: # %cmpxchg.releasedload8
+; CHECK-NEXT: #
+; CHECK-NEXT: ldarx 8, 0, 12
+; CHECK-NEXT: cmpld 8, 6
+; CHECK-NEXT: beq 0, .LBB3_70
+; CHECK-NEXT: .LBB3_72: # %cmpxchg.nostore6
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: crxor 20, 20, 20
+; CHECK-NEXT: b .LBB3_74
+; CHECK-NEXT: .LBB3_73: # %cmpxchg.success7
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: creqv 20, 20, 20
+; CHECK-NEXT: .LBB3_74: # %cmpxchg.end4
+; CHECK-NEXT: li 6, 0
+; CHECK-NEXT: li 7, 1
+; CHECK-NEXT: lbz 3, uc at toc@l(3)
+; CHECK-NEXT: lbz 4, sc at toc@l(4)
+; CHECK-NEXT: isel 6, 7, 6, 20
+; CHECK-NEXT: stw 6, ui at toc@l(5)
+; CHECK-NEXT: ldarx 6, 0, 0
+; CHECK-NEXT: cmpld 6, 3
+; CHECK-NEXT: bne 0, .LBB3_78
+; CHECK-NEXT: # %bb.75: # %cmpxchg.fencedstore
+; CHECK-NEXT: extsb 4, 4
+; CHECK-NEXT: sync
+; CHECK-NEXT: .p2align 5
+; CHECK-NEXT: .LBB3_76: # %cmpxchg.trystore
+; CHECK-NEXT: #
+; CHECK-NEXT: stdcx. 4, 0, 0
+; CHECK-NEXT: beq 0, .LBB3_79
+; CHECK-NEXT: # %bb.77: # %cmpxchg.releasedload
+; CHECK-NEXT: #
+; CHECK-NEXT: ldarx 6, 0, 0
+; CHECK-NEXT: cmpld 6, 3
+; CHECK-NEXT: beq 0, .LBB3_76
+; CHECK-NEXT: .LBB3_78: # %cmpxchg.nostore
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: crxor 20, 20, 20
+; CHECK-NEXT: b .LBB3_80
+; CHECK-NEXT: .LBB3_79: # %cmpxchg.success
+; CHECK-NEXT: lwsync
+; CHECK-NEXT: creqv 20, 20, 20
+; CHECK-NEXT: .LBB3_80: # %cmpxchg.end
+; CHECK-NEXT: li 3, 0
+; CHECK-NEXT: li 4, 1
+; CHECK-NEXT: ld 30, -16(1) # 8-byte Folded Reload
+; CHECK-NEXT: ld 29, -24(1) # 8-byte Folded Reload
+; CHECK-NEXT: ld 28, -32(1) # 8-byte Folded Reload
+; CHECK-NEXT: ld 27, -40(1) # 8-byte Folded Reload
+; CHECK-NEXT: isel 3, 4, 3, 20
+; CHECK-NEXT: stw 3, ui at toc@l(5)
+; CHECK-NEXT: blr
;
; AIX32-LABEL: test_compare_and_swap:
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: mflr 0
-; AIX32-NEXT: stwu 1, -144(1)
-; AIX32-NEXT: stw 0, 152(1)
-; AIX32-NEXT: stw 29, 132(1) # 4-byte Folded Spill
-; AIX32-NEXT: lwz 29, L..C0(2) # @sc
-; AIX32-NEXT: stw 26, 120(1) # 4-byte Folded Spill
-; AIX32-NEXT: not 3, 29
-; AIX32-NEXT: stw 30, 136(1) # 4-byte Folded Spill
-; AIX32-NEXT: lwz 30, L..C1(2) # @uc
-; AIX32-NEXT: lbz 4, 0(30)
-; AIX32-NEXT: lbz 5, 0(29)
-; AIX32-NEXT: stw 27, 124(1) # 4-byte Folded Spill
-; AIX32-NEXT: rlwinm 27, 29, 0, 0, 29
-; AIX32-NEXT: stw 14, 72(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 15, 76(1) # 4-byte Folded Spill
-; AIX32-NEXT: rlwinm 26, 3, 3, 27, 28
-; AIX32-NEXT: li 3, 255
-; AIX32-NEXT: slw 3, 3, 26
-; AIX32-NEXT: stw 16, 80(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 17, 84(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 18, 88(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 19, 92(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 20, 96(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 21, 100(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 22, 104(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 23, 108(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 24, 112(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 25, 116(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 28, 128(1) # 4-byte Folded Spill
-; AIX32-NEXT: stw 31, 140(1) # 4-byte Folded Spill
-; AIX32-NEXT: not 25, 3
-; AIX32-NEXT: lwarx 3, 0, 27
-; AIX32-NEXT: srw 6, 3, 26
-; AIX32-NEXT: clrlwi 6, 6, 24
-; AIX32-NEXT: cmplw 6, 4
-; AIX32-NEXT: bne 0, L..BB3_4
-; AIX32-NEXT: # %bb.1: # %cmpxchg.fencedstore289
-; AIX32-NEXT: sync
-; AIX32-NEXT: slw 5, 5, 26
-; AIX32-NEXT: .align 4
-; AIX32-NEXT: L..BB3_2: # %cmpxchg.trystore288
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: and 6, 3, 25
-; AIX32-NEXT: or 6, 6, 5
-; AIX32-NEXT: stwcx. 6, 0, 27
-; AIX32-NEXT: beq 0, L..BB3_4
-; AIX32-NEXT: # %bb.3: # %cmpxchg.releasedload287
-; AIX32-NEXT: # in Loop: Header=BB3_2 Depth=1
-; AIX32-NEXT: lwarx 3, 0, 27
-; AIX32-NEXT: srw 6, 3, 26
-; AIX32-NEXT: clrlwi 6, 6, 24
-; AIX32-NEXT: cmplw 6, 4
-; AIX32-NEXT: beq 0, L..BB3_2
-; AIX32-NEXT: L..BB3_4: # %cmpxchg.nostore285
-; AIX32-NEXT: not 4, 30
-; AIX32-NEXT: srw 5, 3, 26
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: lbz 3, 0(30)
-; AIX32-NEXT: rlwinm 24, 30, 0, 0, 29
-; AIX32-NEXT: rlwinm 23, 4, 3, 27, 28
-; AIX32-NEXT: li 4, 255
-; AIX32-NEXT: stb 5, 0(29)
-; AIX32-NEXT: slw 4, 4, 23
-; AIX32-NEXT: not 22, 4
-; AIX32-NEXT: lwarx 4, 0, 24
-; AIX32-NEXT: srw 6, 4, 23
-; AIX32-NEXT: clrlwi 6, 6, 24
-; AIX32-NEXT: cmplw 6, 3
-; AIX32-NEXT: bne 0, L..BB3_8
-; AIX32-NEXT: # %bb.5: # %cmpxchg.fencedstore256
-; AIX32-NEXT: clrlwi 5, 5, 24
-; AIX32-NEXT: sync
-; AIX32-NEXT: slw 5, 5, 23
-; AIX32-NEXT: .align 4
-; AIX32-NEXT: L..BB3_6: # %cmpxchg.trystore255
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: and 6, 4, 22
-; AIX32-NEXT: or 6, 6, 5
-; AIX32-NEXT: stwcx. 6, 0, 24
-; AIX32-NEXT: beq 0, L..BB3_8
-; AIX32-NEXT: # %bb.7: # %cmpxchg.releasedload254
-; AIX32-NEXT: # in Loop: Header=BB3_6 Depth=1
-; AIX32-NEXT: lwarx 4, 0, 24
-; AIX32-NEXT: srw 6, 4, 23
-; AIX32-NEXT: clrlwi 6, 6, 24
-; AIX32-NEXT: cmplw 6, 3
-; AIX32-NEXT: beq 0, L..BB3_6
-; AIX32-NEXT: L..BB3_8: # %cmpxchg.nostore252
-; AIX32-NEXT: srw 4, 4, 23
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: lis 3, 0
-; AIX32-NEXT: lbz 7, 0(29)
-; AIX32-NEXT: stb 4, 0(30)
-; AIX32-NEXT: clrlwi 6, 4, 24
-; AIX32-NEXT: lwz 4, L..C2(2) # @ss
-; AIX32-NEXT: ori 3, 3, 65535
-; AIX32-NEXT: clrlwi 5, 4, 30
-; AIX32-NEXT: rlwinm 21, 4, 0, 0, 29
-; AIX32-NEXT: xori 5, 5, 2
-; AIX32-NEXT: slwi 20, 5, 3
-; AIX32-NEXT: slw 5, 3, 20
-; AIX32-NEXT: not 19, 5
-; AIX32-NEXT: lwarx 5, 0, 21
-; AIX32-NEXT: srw 8, 5, 20
-; AIX32-NEXT: clrlwi 8, 8, 16
-; AIX32-NEXT: cmplw 8, 6
-; AIX32-NEXT: bne 0, L..BB3_12
-; AIX32-NEXT: # %bb.9: # %cmpxchg.fencedstore223
-; AIX32-NEXT: extsb 7, 7
-; AIX32-NEXT: sync
-; AIX32-NEXT: clrlwi 7, 7, 16
-; AIX32-NEXT: slw 7, 7, 20
-; AIX32-NEXT: .align 4
-; AIX32-NEXT: L..BB3_10: # %cmpxchg.trystore222
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: and 8, 5, 19
-; AIX32-NEXT: or 8, 8, 7
-; AIX32-NEXT: stwcx. 8, 0, 21
-; AIX32-NEXT: beq 0, L..BB3_12
-; AIX32-NEXT: # %bb.11: # %cmpxchg.releasedload221
-; AIX32-NEXT: # in Loop: Header=BB3_10 Depth=1
-; AIX32-NEXT: lwarx 5, 0, 21
-; AIX32-NEXT: srw 8, 5, 20
-; AIX32-NEXT: clrlwi 8, 8, 16
-; AIX32-NEXT: cmplw 8, 6
-; AIX32-NEXT: beq 0, L..BB3_10
-; AIX32-NEXT: L..BB3_12: # %cmpxchg.nostore219
-; AIX32-NEXT: srw 5, 5, 20
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: lbz 6, 0(29)
-; AIX32-NEXT: sth 5, 0(4)
-; AIX32-NEXT: lwz 4, L..C3(2) # @us
-; AIX32-NEXT: lbz 5, 0(30)
-; AIX32-NEXT: clrlwi 7, 4, 30
-; AIX32-NEXT: rlwinm 18, 4, 0, 0, 29
-; AIX32-NEXT: xori 7, 7, 2
-; AIX32-NEXT: slwi 17, 7, 3
-; AIX32-NEXT: slw 3, 3, 17
-; AIX32-NEXT: not 16, 3
-; AIX32-NEXT: lwarx 3, 0, 18
-; AIX32-NEXT: srw 7, 3, 17
-; AIX32-NEXT: clrlwi 7, 7, 16
-; AIX32-NEXT: cmplw 7, 5
-; AIX32-NEXT: bne 0, L..BB3_16
-; AIX32-NEXT: # %bb.13: # %cmpxchg.fencedstore190
-; AIX32-NEXT: extsb 6, 6
-; AIX32-NEXT: sync
-; AIX32-NEXT: clrlwi 6, 6, 16
-; AIX32-NEXT: slw 6, 6, 17
-; AIX32-NEXT: .align 4
-; AIX32-NEXT: L..BB3_14: # %cmpxchg.trystore189
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: and 7, 3, 16
-; AIX32-NEXT: or 7, 7, 6
-; AIX32-NEXT: stwcx. 7, 0, 18
-; AIX32-NEXT: beq 0, L..BB3_16
-; AIX32-NEXT: # %bb.15: # %cmpxchg.releasedload188
-; AIX32-NEXT: # in Loop: Header=BB3_14 Depth=1
-; AIX32-NEXT: lwarx 3, 0, 18
-; AIX32-NEXT: srw 7, 3, 17
-; AIX32-NEXT: clrlwi 7, 7, 16
-; AIX32-NEXT: cmplw 7, 5
-; AIX32-NEXT: beq 0, L..BB3_14
-; AIX32-NEXT: L..BB3_16: # %cmpxchg.nostore186
-; AIX32-NEXT: srw 3, 3, 17
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: lwz 15, L..C4(2) # @si
-; AIX32-NEXT: lbz 5, 0(29)
-; AIX32-NEXT: sth 3, 0(4)
-; AIX32-NEXT: lbz 4, 0(30)
-; AIX32-NEXT: lwarx 3, 0, 15
-; AIX32-NEXT: cmplw 3, 4
-; AIX32-NEXT: bne 0, L..BB3_20
-; AIX32-NEXT: # %bb.17: # %cmpxchg.fencedstore171
-; AIX32-NEXT: extsb 5, 5
-; AIX32-NEXT: sync
-; AIX32-NEXT: .align 5
-; AIX32-NEXT: L..BB3_18: # %cmpxchg.trystore170
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: stwcx. 5, 0, 15
-; AIX32-NEXT: beq 0, L..BB3_20
-; AIX32-NEXT: # %bb.19: # %cmpxchg.releasedload169
-; AIX32-NEXT: # in Loop: Header=BB3_18 Depth=1
-; AIX32-NEXT: lwarx 3, 0, 15
-; AIX32-NEXT: cmplw 3, 4
-; AIX32-NEXT: beq 0, L..BB3_18
-; AIX32-NEXT: L..BB3_20: # %cmpxchg.nostore167
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: lwz 28, L..C5(2) # @ui
-; AIX32-NEXT: stw 3, 0(15)
-; AIX32-NEXT: lbz 4, 0(30)
-; AIX32-NEXT: lbz 5, 0(29)
-; AIX32-NEXT: lwarx 3, 0, 28
-; AIX32-NEXT: cmplw 3, 4
-; AIX32-NEXT: bne 0, L..BB3_24
-; AIX32-NEXT: # %bb.21: # %cmpxchg.fencedstore152
-; AIX32-NEXT: extsb 5, 5
-; AIX32-NEXT: sync
-; AIX32-NEXT: .align 5
-; AIX32-NEXT: L..BB3_22: # %cmpxchg.trystore151
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: stwcx. 5, 0, 28
-; AIX32-NEXT: beq 0, L..BB3_24
-; AIX32-NEXT: # %bb.23: # %cmpxchg.releasedload150
-; AIX32-NEXT: # in Loop: Header=BB3_22 Depth=1
-; AIX32-NEXT: lwarx 3, 0, 28
-; AIX32-NEXT: cmplw 3, 4
-; AIX32-NEXT: beq 0, L..BB3_22
-; AIX32-NEXT: L..BB3_24: # %cmpxchg.nostore148
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: stw 3, 0(28)
-; AIX32-NEXT: lwz 31, L..C6(2) # @sll
-; AIX32-NEXT: lbz 3, 0(29)
-; AIX32-NEXT: li 14, 0
-; AIX32-NEXT: addi 4, 1, 64
-; AIX32-NEXT: li 7, 5
-; AIX32-NEXT: li 8, 5
-; AIX32-NEXT: stw 14, 64(1)
-; AIX32-NEXT: extsb 6, 3
-; AIX32-NEXT: lbz 3, 0(30)
-; AIX32-NEXT: srawi 5, 6, 31
-; AIX32-NEXT: stw 3, 68(1)
-; AIX32-NEXT: mr 3, 31
-; AIX32-NEXT: bl .__atomic_compare_exchange_8[PR]
-; AIX32-NEXT: nop
-; AIX32-NEXT: lwz 3, 68(1)
-; AIX32-NEXT: lbz 4, 0(29)
-; AIX32-NEXT: li 7, 5
-; AIX32-NEXT: li 8, 5
-; AIX32-NEXT: stw 3, 4(31)
-; AIX32-NEXT: lwz 3, 64(1)
-; AIX32-NEXT: extsb 6, 4
-; AIX32-NEXT: addi 4, 1, 64
-; AIX32-NEXT: stw 14, 64(1)
-; AIX32-NEXT: srawi 5, 6, 31
-; AIX32-NEXT: stw 3, 0(31)
-; AIX32-NEXT: lbz 3, 0(30)
-; AIX32-NEXT: lwz 31, L..C7(2) # @ull
-; AIX32-NEXT: stw 3, 68(1)
-; AIX32-NEXT: mr 3, 31
-; AIX32-NEXT: bl .__atomic_compare_exchange_8[PR]
-; AIX32-NEXT: nop
-; AIX32-NEXT: lwz 3, 64(1)
-; AIX32-NEXT: lwz 4, 68(1)
-; AIX32-NEXT: lbz 5, 0(29)
-; AIX32-NEXT: stw 4, 4(31)
-; AIX32-NEXT: stw 3, 0(31)
-; AIX32-NEXT: lbz 3, 0(30)
-; AIX32-NEXT: lwarx 4, 0, 27
-; AIX32-NEXT: srw 6, 4, 26
-; AIX32-NEXT: clrlwi 6, 6, 24
-; AIX32-NEXT: cmplw 6, 3
-; AIX32-NEXT: bne 0, L..BB3_28
-; AIX32-NEXT: # %bb.25: # %cmpxchg.fencedstore119
-; AIX32-NEXT: sync
-; AIX32-NEXT: slw 5, 5, 26
-; AIX32-NEXT: .align 4
-; AIX32-NEXT: L..BB3_26: # %cmpxchg.trystore118
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: and 4, 4, 25
-; AIX32-NEXT: or 4, 4, 5
-; AIX32-NEXT: stwcx. 4, 0, 27
-; AIX32-NEXT: beq 0, L..BB3_29
-; AIX32-NEXT: # %bb.27: # %cmpxchg.releasedload117
-; AIX32-NEXT: # in Loop: Header=BB3_26 Depth=1
-; AIX32-NEXT: lwarx 4, 0, 27
-; AIX32-NEXT: srw 6, 4, 26
-; AIX32-NEXT: clrlwi 6, 6, 24
-; AIX32-NEXT: cmplw 6, 3
-; AIX32-NEXT: beq 0, L..BB3_26
-; AIX32-NEXT: L..BB3_28: # %cmpxchg.nostore115
-; AIX32-NEXT: crxor 20, 20, 20
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: b L..BB3_30
-; AIX32-NEXT: L..BB3_29: # %cmpxchg.success116
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: creqv 20, 20, 20
-; AIX32-NEXT: L..BB3_30: # %cmpxchg.end113
-; AIX32-NEXT: li 3, 0
-; AIX32-NEXT: li 4, 1
-; AIX32-NEXT: lbz 5, 0(29)
-; AIX32-NEXT: isel 3, 4, 3, 20
-; AIX32-NEXT: stw 3, 0(28)
-; AIX32-NEXT: lbz 3, 0(30)
-; AIX32-NEXT: lwarx 4, 0, 24
-; AIX32-NEXT: srw 6, 4, 23
-; AIX32-NEXT: clrlwi 6, 6, 24
-; AIX32-NEXT: cmplw 6, 3
-; AIX32-NEXT: bne 0, L..BB3_34
-; AIX32-NEXT: # %bb.31: # %cmpxchg.fencedstore86
-; AIX32-NEXT: sync
-; AIX32-NEXT: slw 5, 5, 23
-; AIX32-NEXT: .align 4
-; AIX32-NEXT: L..BB3_32: # %cmpxchg.trystore85
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: and 4, 4, 22
-; AIX32-NEXT: or 4, 4, 5
-; AIX32-NEXT: stwcx. 4, 0, 24
-; AIX32-NEXT: beq 0, L..BB3_35
-; AIX32-NEXT: # %bb.33: # %cmpxchg.releasedload84
-; AIX32-NEXT: # in Loop: Header=BB3_32 Depth=1
-; AIX32-NEXT: lwarx 4, 0, 24
-; AIX32-NEXT: srw 6, 4, 23
-; AIX32-NEXT: clrlwi 6, 6, 24
-; AIX32-NEXT: cmplw 6, 3
-; AIX32-NEXT: beq 0, L..BB3_32
-; AIX32-NEXT: L..BB3_34: # %cmpxchg.nostore82
-; AIX32-NEXT: crxor 20, 20, 20
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: b L..BB3_36
-; AIX32-NEXT: L..BB3_35: # %cmpxchg.success83
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: creqv 20, 20, 20
-; AIX32-NEXT: L..BB3_36: # %cmpxchg.end80
-; AIX32-NEXT: li 3, 0
-; AIX32-NEXT: li 4, 1
-; AIX32-NEXT: lbz 5, 0(29)
-; AIX32-NEXT: isel 3, 4, 3, 20
-; AIX32-NEXT: stw 3, 0(28)
-; AIX32-NEXT: lbz 3, 0(30)
-; AIX32-NEXT: lwarx 4, 0, 21
-; AIX32-NEXT: srw 6, 4, 20
-; AIX32-NEXT: clrlwi 6, 6, 16
-; AIX32-NEXT: cmplw 6, 3
-; AIX32-NEXT: bne 0, L..BB3_40
-; AIX32-NEXT: # %bb.37: # %cmpxchg.fencedstore53
-; AIX32-NEXT: extsb 5, 5
-; AIX32-NEXT: sync
-; AIX32-NEXT: clrlwi 5, 5, 16
-; AIX32-NEXT: slw 5, 5, 20
-; AIX32-NEXT: .align 4
-; AIX32-NEXT: L..BB3_38: # %cmpxchg.trystore52
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: and 4, 4, 19
-; AIX32-NEXT: or 4, 4, 5
-; AIX32-NEXT: stwcx. 4, 0, 21
-; AIX32-NEXT: beq 0, L..BB3_41
-; AIX32-NEXT: # %bb.39: # %cmpxchg.releasedload51
-; AIX32-NEXT: # in Loop: Header=BB3_38 Depth=1
-; AIX32-NEXT: lwarx 4, 0, 21
-; AIX32-NEXT: srw 6, 4, 20
-; AIX32-NEXT: clrlwi 6, 6, 16
-; AIX32-NEXT: cmplw 6, 3
-; AIX32-NEXT: beq 0, L..BB3_38
-; AIX32-NEXT: L..BB3_40: # %cmpxchg.nostore49
-; AIX32-NEXT: crxor 20, 20, 20
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: b L..BB3_42
-; AIX32-NEXT: L..BB3_41: # %cmpxchg.success50
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: creqv 20, 20, 20
-; AIX32-NEXT: L..BB3_42: # %cmpxchg.end47
-; AIX32-NEXT: li 3, 0
-; AIX32-NEXT: li 4, 1
-; AIX32-NEXT: lbz 5, 0(29)
-; AIX32-NEXT: isel 3, 4, 3, 20
-; AIX32-NEXT: stw 3, 0(28)
-; AIX32-NEXT: lbz 3, 0(30)
-; AIX32-NEXT: lwarx 4, 0, 18
-; AIX32-NEXT: srw 6, 4, 17
-; AIX32-NEXT: clrlwi 6, 6, 16
-; AIX32-NEXT: cmplw 6, 3
-; AIX32-NEXT: bne 0, L..BB3_46
-; AIX32-NEXT: # %bb.43: # %cmpxchg.fencedstore29
-; AIX32-NEXT: extsb 5, 5
-; AIX32-NEXT: sync
-; AIX32-NEXT: clrlwi 5, 5, 16
-; AIX32-NEXT: slw 5, 5, 17
-; AIX32-NEXT: .align 4
-; AIX32-NEXT: L..BB3_44: # %cmpxchg.trystore28
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: and 4, 4, 16
-; AIX32-NEXT: or 4, 4, 5
-; AIX32-NEXT: stwcx. 4, 0, 18
-; AIX32-NEXT: beq 0, L..BB3_47
-; AIX32-NEXT: # %bb.45: # %cmpxchg.releasedload27
-; AIX32-NEXT: # in Loop: Header=BB3_44 Depth=1
-; AIX32-NEXT: lwarx 4, 0, 18
-; AIX32-NEXT: srw 6, 4, 17
-; AIX32-NEXT: clrlwi 6, 6, 16
-; AIX32-NEXT: cmplw 6, 3
-; AIX32-NEXT: beq 0, L..BB3_44
-; AIX32-NEXT: L..BB3_46: # %cmpxchg.nostore25
-; AIX32-NEXT: crxor 20, 20, 20
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: b L..BB3_48
-; AIX32-NEXT: L..BB3_47: # %cmpxchg.success26
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: creqv 20, 20, 20
-; AIX32-NEXT: L..BB3_48: # %cmpxchg.end23
-; AIX32-NEXT: li 3, 0
-; AIX32-NEXT: li 4, 1
-; AIX32-NEXT: isel 3, 4, 3, 20
-; AIX32-NEXT: lbz 4, 0(29)
-; AIX32-NEXT: stw 3, 0(28)
-; AIX32-NEXT: lbz 3, 0(30)
-; AIX32-NEXT: lwarx 5, 0, 15
-; AIX32-NEXT: cmplw 5, 3
-; AIX32-NEXT: bne 0, L..BB3_52
-; AIX32-NEXT: # %bb.49: # %cmpxchg.fencedstore10
-; AIX32-NEXT: extsb 4, 4
-; AIX32-NEXT: sync
-; AIX32-NEXT: .align 5
-; AIX32-NEXT: L..BB3_50: # %cmpxchg.trystore9
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: stwcx. 4, 0, 15
-; AIX32-NEXT: beq 0, L..BB3_53
-; AIX32-NEXT: # %bb.51: # %cmpxchg.releasedload8
-; AIX32-NEXT: # in Loop: Header=BB3_50 Depth=1
-; AIX32-NEXT: lwarx 5, 0, 15
-; AIX32-NEXT: cmplw 5, 3
-; AIX32-NEXT: beq 0, L..BB3_50
-; AIX32-NEXT: L..BB3_52: # %cmpxchg.nostore6
-; AIX32-NEXT: crxor 20, 20, 20
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: b L..BB3_54
-; AIX32-NEXT: L..BB3_53: # %cmpxchg.success7
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: creqv 20, 20, 20
-; AIX32-NEXT: L..BB3_54: # %cmpxchg.end4
-; AIX32-NEXT: li 3, 0
-; AIX32-NEXT: li 4, 1
-; AIX32-NEXT: isel 3, 4, 3, 20
-; AIX32-NEXT: lbz 4, 0(29)
-; AIX32-NEXT: stw 3, 0(28)
-; AIX32-NEXT: lbz 3, 0(30)
-; AIX32-NEXT: lwarx 5, 0, 28
-; AIX32-NEXT: cmplw 5, 3
-; AIX32-NEXT: bne 0, L..BB3_58
-; AIX32-NEXT: # %bb.55: # %cmpxchg.fencedstore
-; AIX32-NEXT: extsb 4, 4
-; AIX32-NEXT: sync
-; AIX32-NEXT: .align 5
-; AIX32-NEXT: L..BB3_56: # %cmpxchg.trystore
-; AIX32-NEXT: # =>This Inner Loop Header: Depth=1
-; AIX32-NEXT: stwcx. 4, 0, 28
-; AIX32-NEXT: beq 0, L..BB3_59
-; AIX32-NEXT: # %bb.57: # %cmpxchg.releasedload
-; AIX32-NEXT: # in Loop: Header=BB3_56 Depth=1
-; AIX32-NEXT: lwarx 5, 0, 28
-; AIX32-NEXT: cmplw 5, 3
-; AIX32-NEXT: beq 0, L..BB3_56
-; AIX32-NEXT: L..BB3_58: # %cmpxchg.nostore
-; AIX32-NEXT: crxor 20, 20, 20
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: b L..BB3_60
-; AIX32-NEXT: L..BB3_59: # %cmpxchg.success
-; AIX32-NEXT: lwsync
-; AIX32-NEXT: creqv 20, 20, 20
-; AIX32-NEXT: L..BB3_60: # %cmpxchg.end
-; AIX32-NEXT: li 3, 1
-; AIX32-NEXT: li 31, 0
-; AIX32-NEXT: lbz 4, 0(29)
-; AIX32-NEXT: isel 3, 3, 31, 20
-; AIX32-NEXT: li 7, 5
-; AIX32-NEXT: li 8, 5
-; AIX32-NEXT: extsb 6, 4
-; AIX32-NEXT: stw 3, 0(28)
-; AIX32-NEXT: lbz 3, 0(30)
-; AIX32-NEXT: addi 4, 1, 64
-; AIX32-NEXT: stw 31, 64(1)
-; AIX32-NEXT: srawi 5, 6, 31
-; AIX32-NEXT: stw 3, 68(1)
-; AIX32-NEXT: lwz 3, L..C6(2) # @sll
-; AIX32-NEXT: bl .__atomic_compare_exchange_8[PR]
-; AIX32-NEXT: nop
-; AIX32-NEXT: lbz 4, 0(29)
-; AIX32-NEXT: stw 3, 0(28)
-; AIX32-NEXT: lbz 3, 0(30)
-; AIX32-NEXT: li 7, 5
-; AIX32-NEXT: li 8, 5
-; AIX32-NEXT: extsb 6, 4
-; AIX32-NEXT: stw 3, 68(1)
-; AIX32-NEXT: lwz 3, L..C7(2) # @ull
-; AIX32-NEXT: addi 4, 1, 64
-; AIX32-NEXT: stw 31, 64(1)
-; AIX32-NEXT: srawi 5, 6, 31
-; AIX32-NEXT: bl .__atomic_compare_exchange_8[PR]
-; AIX32-NEXT: nop
-; AIX32-NEXT: stw 3, 0(28)
-; AIX32-NEXT: lwz 31, 140(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 30, 136(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 29, 132(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 28, 128(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 27, 124(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 26, 120(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 25, 116(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 24, 112(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 23, 108(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 22, 104(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 21, 100(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 20, 96(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 19, 92(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 18, 88(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 17, 84(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 16, 80(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 15, 76(1) # 4-byte Folded Reload
-; AIX32-NEXT: lwz 14, 72(1) # 4-byte Folded Reload
-; AIX32-NEXT: addi 1, 1, 144
-; AIX32-NEXT: lwz 0, 8(1)
-; AIX32-NEXT: mtlr 0
+; AIX32-NEXT: stwu 1, -144(1)
+; AIX32-NEXT: stw 0, 152(1)
+; AIX32-NEXT: stw 29, 132(1) # 4-byte Folded Spill
+; AIX32-NEXT: lwz 29, L..C0(2) # @sc
+; AIX32-NEXT: stw 26, 120(1) # 4-byte Folded Spill
+; AIX32-NEXT: not 3, 29
+; AIX32-NEXT: stw 30, 136(1) # 4-byte Folded Spill
+; AIX32-NEXT: lwz 30, L..C1(2) # @uc
+; AIX32-NEXT: lbz 4, 0(30)
+; AIX32-NEXT: lbz 5, 0(29)
+; AIX32-NEXT: stw 27, 124(1) # 4-byte Folded Spill
+; AIX32-NEXT: rlwinm 27, 29, 0, 0, 29
+; AIX32-NEXT: stw 14, 72(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 15, 76(1) # 4-byte Folded Spill
+; AIX32-NEXT: rlwinm 26, 3, 3, 27, 28
+; AIX32-NEXT: li 3, 255
+; AIX32-NEXT: slw 3, 3, 26
+; AIX32-NEXT: stw 16, 80(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 17, 84(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 18, 88(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 19, 92(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 20, 96(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 21, 100(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 22, 104(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 23, 108(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 24, 112(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 25, 116(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 28, 128(1) # 4-byte Folded Spill
+; AIX32-NEXT: stw 31, 140(1) # 4-byte Folded Spill
+; AIX32-NEXT: not 25, 3
+; AIX32-NEXT: lwarx 3, 0, 27
+; AIX32-NEXT: srw 6, 3, 26
+; AIX32-NEXT: clrlwi 6, 6, 24
+; AIX32-NEXT: cmplw 6, 4
+; AIX32-NEXT: bne 0, L..BB3_4
+; AIX32-NEXT: # %bb.1: # %cmpxchg.fencedstore289
+; AIX32-NEXT: sync
+; AIX32-NEXT: slw 5, 5, 26
+; AIX32-NEXT: .align 4
+; AIX32-NEXT: L..BB3_2: # %cmpxchg.trystore288
+; AIX32-NEXT: #
+; AIX32-NEXT: and 6, 3, 25
+; AIX32-NEXT: or 6, 6, 5
+; AIX32-NEXT: stwcx. 6, 0, 27
+; AIX32-NEXT: beq 0, L..BB3_4
+; AIX32-NEXT: # %bb.3: # %cmpxchg.releasedload287
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 3, 0, 27
+; AIX32-NEXT: srw 6, 3, 26
+; AIX32-NEXT: clrlwi 6, 6, 24
+; AIX32-NEXT: cmplw 6, 4
+; AIX32-NEXT: beq 0, L..BB3_2
+; AIX32-NEXT: L..BB3_4: # %cmpxchg.nostore285
+; AIX32-NEXT: not 4, 30
+; AIX32-NEXT: srw 5, 3, 26
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: lbz 3, 0(30)
+; AIX32-NEXT: rlwinm 24, 30, 0, 0, 29
+; AIX32-NEXT: rlwinm 23, 4, 3, 27, 28
+; AIX32-NEXT: li 4, 255
+; AIX32-NEXT: stb 5, 0(29)
+; AIX32-NEXT: slw 4, 4, 23
+; AIX32-NEXT: not 22, 4
+; AIX32-NEXT: lwarx 4, 0, 24
+; AIX32-NEXT: srw 6, 4, 23
+; AIX32-NEXT: clrlwi 6, 6, 24
+; AIX32-NEXT: cmplw 6, 3
+; AIX32-NEXT: bne 0, L..BB3_8
+; AIX32-NEXT: # %bb.5: # %cmpxchg.fencedstore256
+; AIX32-NEXT: clrlwi 5, 5, 24
+; AIX32-NEXT: sync
+; AIX32-NEXT: slw 5, 5, 23
+; AIX32-NEXT: .align 4
+; AIX32-NEXT: L..BB3_6: # %cmpxchg.trystore255
+; AIX32-NEXT: #
+; AIX32-NEXT: and 6, 4, 22
+; AIX32-NEXT: or 6, 6, 5
+; AIX32-NEXT: stwcx. 6, 0, 24
+; AIX32-NEXT: beq 0, L..BB3_8
+; AIX32-NEXT: # %bb.7: # %cmpxchg.releasedload254
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 4, 0, 24
+; AIX32-NEXT: srw 6, 4, 23
+; AIX32-NEXT: clrlwi 6, 6, 24
+; AIX32-NEXT: cmplw 6, 3
+; AIX32-NEXT: beq 0, L..BB3_6
+; AIX32-NEXT: L..BB3_8: # %cmpxchg.nostore252
+; AIX32-NEXT: srw 4, 4, 23
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: lis 3, 0
+; AIX32-NEXT: lbz 7, 0(29)
+; AIX32-NEXT: stb 4, 0(30)
+; AIX32-NEXT: clrlwi 6, 4, 24
+; AIX32-NEXT: lwz 4, L..C2(2) # @ss
+; AIX32-NEXT: ori 3, 3, 65535
+; AIX32-NEXT: clrlwi 5, 4, 30
+; AIX32-NEXT: rlwinm 21, 4, 0, 0, 29
+; AIX32-NEXT: xori 5, 5, 2
+; AIX32-NEXT: slwi 20, 5, 3
+; AIX32-NEXT: slw 5, 3, 20
+; AIX32-NEXT: not 19, 5
+; AIX32-NEXT: lwarx 5, 0, 21
+; AIX32-NEXT: srw 8, 5, 20
+; AIX32-NEXT: clrlwi 8, 8, 16
+; AIX32-NEXT: cmplw 8, 6
+; AIX32-NEXT: bne 0, L..BB3_12
+; AIX32-NEXT: # %bb.9: # %cmpxchg.fencedstore223
+; AIX32-NEXT: extsb 7, 7
+; AIX32-NEXT: sync
+; AIX32-NEXT: clrlwi 7, 7, 16
+; AIX32-NEXT: slw 7, 7, 20
+; AIX32-NEXT: .align 4
+; AIX32-NEXT: L..BB3_10: # %cmpxchg.trystore222
+; AIX32-NEXT: #
+; AIX32-NEXT: and 8, 5, 19
+; AIX32-NEXT: or 8, 8, 7
+; AIX32-NEXT: stwcx. 8, 0, 21
+; AIX32-NEXT: beq 0, L..BB3_12
+; AIX32-NEXT: # %bb.11: # %cmpxchg.releasedload221
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 5, 0, 21
+; AIX32-NEXT: srw 8, 5, 20
+; AIX32-NEXT: clrlwi 8, 8, 16
+; AIX32-NEXT: cmplw 8, 6
+; AIX32-NEXT: beq 0, L..BB3_10
+; AIX32-NEXT: L..BB3_12: # %cmpxchg.nostore219
+; AIX32-NEXT: srw 5, 5, 20
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: lbz 6, 0(29)
+; AIX32-NEXT: sth 5, 0(4)
+; AIX32-NEXT: lwz 4, L..C3(2) # @us
+; AIX32-NEXT: lbz 5, 0(30)
+; AIX32-NEXT: clrlwi 7, 4, 30
+; AIX32-NEXT: rlwinm 18, 4, 0, 0, 29
+; AIX32-NEXT: xori 7, 7, 2
+; AIX32-NEXT: slwi 17, 7, 3
+; AIX32-NEXT: slw 3, 3, 17
+; AIX32-NEXT: not 16, 3
+; AIX32-NEXT: lwarx 3, 0, 18
+; AIX32-NEXT: srw 7, 3, 17
+; AIX32-NEXT: clrlwi 7, 7, 16
+; AIX32-NEXT: cmplw 7, 5
+; AIX32-NEXT: bne 0, L..BB3_16
+; AIX32-NEXT: # %bb.13: # %cmpxchg.fencedstore190
+; AIX32-NEXT: extsb 6, 6
+; AIX32-NEXT: sync
+; AIX32-NEXT: clrlwi 6, 6, 16
+; AIX32-NEXT: slw 6, 6, 17
+; AIX32-NEXT: .align 4
+; AIX32-NEXT: L..BB3_14: # %cmpxchg.trystore189
+; AIX32-NEXT: #
+; AIX32-NEXT: and 7, 3, 16
+; AIX32-NEXT: or 7, 7, 6
+; AIX32-NEXT: stwcx. 7, 0, 18
+; AIX32-NEXT: beq 0, L..BB3_16
+; AIX32-NEXT: # %bb.15: # %cmpxchg.releasedload188
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 3, 0, 18
+; AIX32-NEXT: srw 7, 3, 17
+; AIX32-NEXT: clrlwi 7, 7, 16
+; AIX32-NEXT: cmplw 7, 5
+; AIX32-NEXT: beq 0, L..BB3_14
+; AIX32-NEXT: L..BB3_16: # %cmpxchg.nostore186
+; AIX32-NEXT: srw 3, 3, 17
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: lwz 15, L..C4(2) # @si
+; AIX32-NEXT: lbz 5, 0(29)
+; AIX32-NEXT: sth 3, 0(4)
+; AIX32-NEXT: lbz 4, 0(30)
+; AIX32-NEXT: lwarx 3, 0, 15
+; AIX32-NEXT: cmplw 3, 4
+; AIX32-NEXT: bne 0, L..BB3_20
+; AIX32-NEXT: # %bb.17: # %cmpxchg.fencedstore171
+; AIX32-NEXT: extsb 5, 5
+; AIX32-NEXT: sync
+; AIX32-NEXT: .align 5
+; AIX32-NEXT: L..BB3_18: # %cmpxchg.trystore170
+; AIX32-NEXT: #
+; AIX32-NEXT: stwcx. 5, 0, 15
+; AIX32-NEXT: beq 0, L..BB3_20
+; AIX32-NEXT: # %bb.19: # %cmpxchg.releasedload169
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 3, 0, 15
+; AIX32-NEXT: cmplw 3, 4
+; AIX32-NEXT: beq 0, L..BB3_18
+; AIX32-NEXT: L..BB3_20: # %cmpxchg.nostore167
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: lwz 28, L..C5(2) # @ui
+; AIX32-NEXT: stw 3, 0(15)
+; AIX32-NEXT: lbz 4, 0(30)
+; AIX32-NEXT: lbz 5, 0(29)
+; AIX32-NEXT: lwarx 3, 0, 28
+; AIX32-NEXT: cmplw 3, 4
+; AIX32-NEXT: bne 0, L..BB3_24
+; AIX32-NEXT: # %bb.21: # %cmpxchg.fencedstore152
+; AIX32-NEXT: extsb 5, 5
+; AIX32-NEXT: sync
+; AIX32-NEXT: .align 5
+; AIX32-NEXT: L..BB3_22: # %cmpxchg.trystore151
+; AIX32-NEXT: #
+; AIX32-NEXT: stwcx. 5, 0, 28
+; AIX32-NEXT: beq 0, L..BB3_24
+; AIX32-NEXT: # %bb.23: # %cmpxchg.releasedload150
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 3, 0, 28
+; AIX32-NEXT: cmplw 3, 4
+; AIX32-NEXT: beq 0, L..BB3_22
+; AIX32-NEXT: L..BB3_24: # %cmpxchg.nostore148
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: stw 3, 0(28)
+; AIX32-NEXT: lwz 31, L..C6(2) # @sll
+; AIX32-NEXT: lbz 3, 0(29)
+; AIX32-NEXT: li 14, 0
+; AIX32-NEXT: addi 4, 1, 64
+; AIX32-NEXT: li 7, 5
+; AIX32-NEXT: li 8, 5
+; AIX32-NEXT: stw 14, 64(1)
+; AIX32-NEXT: extsb 6, 3
+; AIX32-NEXT: lbz 3, 0(30)
+; AIX32-NEXT: srawi 5, 6, 31
+; AIX32-NEXT: stw 3, 68(1)
+; AIX32-NEXT: mr 3, 31
+; AIX32-NEXT: bl .__atomic_compare_exchange_8[PR]
+; AIX32-NEXT: nop
+; AIX32-NEXT: lwz 3, 68(1)
+; AIX32-NEXT: lbz 4, 0(29)
+; AIX32-NEXT: li 7, 5
+; AIX32-NEXT: li 8, 5
+; AIX32-NEXT: stw 3, 4(31)
+; AIX32-NEXT: lwz 3, 64(1)
+; AIX32-NEXT: extsb 6, 4
+; AIX32-NEXT: addi 4, 1, 64
+; AIX32-NEXT: stw 14, 64(1)
+; AIX32-NEXT: srawi 5, 6, 31
+; AIX32-NEXT: stw 3, 0(31)
+; AIX32-NEXT: lbz 3, 0(30)
+; AIX32-NEXT: lwz 31, L..C7(2) # @ull
+; AIX32-NEXT: stw 3, 68(1)
+; AIX32-NEXT: mr 3, 31
+; AIX32-NEXT: bl .__atomic_compare_exchange_8[PR]
+; AIX32-NEXT: nop
+; AIX32-NEXT: lwz 3, 64(1)
+; AIX32-NEXT: lwz 4, 68(1)
+; AIX32-NEXT: lbz 5, 0(29)
+; AIX32-NEXT: stw 4, 4(31)
+; AIX32-NEXT: stw 3, 0(31)
+; AIX32-NEXT: lbz 3, 0(30)
+; AIX32-NEXT: lwarx 4, 0, 27
+; AIX32-NEXT: srw 6, 4, 26
+; AIX32-NEXT: clrlwi 6, 6, 24
+; AIX32-NEXT: cmplw 6, 3
+; AIX32-NEXT: bne 0, L..BB3_28
+; AIX32-NEXT: # %bb.25: # %cmpxchg.fencedstore119
+; AIX32-NEXT: sync
+; AIX32-NEXT: slw 5, 5, 26
+; AIX32-NEXT: .align 4
+; AIX32-NEXT: L..BB3_26: # %cmpxchg.trystore118
+; AIX32-NEXT: #
+; AIX32-NEXT: and 4, 4, 25
+; AIX32-NEXT: or 4, 4, 5
+; AIX32-NEXT: stwcx. 4, 0, 27
+; AIX32-NEXT: beq 0, L..BB3_29
+; AIX32-NEXT: # %bb.27: # %cmpxchg.releasedload117
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 4, 0, 27
+; AIX32-NEXT: srw 6, 4, 26
+; AIX32-NEXT: clrlwi 6, 6, 24
+; AIX32-NEXT: cmplw 6, 3
+; AIX32-NEXT: beq 0, L..BB3_26
+; AIX32-NEXT: L..BB3_28: # %cmpxchg.nostore115
+; AIX32-NEXT: crxor 20, 20, 20
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: b L..BB3_30
+; AIX32-NEXT: L..BB3_29: # %cmpxchg.success116
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: creqv 20, 20, 20
+; AIX32-NEXT: L..BB3_30: # %cmpxchg.end113
+; AIX32-NEXT: li 3, 0
+; AIX32-NEXT: li 4, 1
+; AIX32-NEXT: lbz 5, 0(29)
+; AIX32-NEXT: isel 3, 4, 3, 20
+; AIX32-NEXT: stw 3, 0(28)
+; AIX32-NEXT: lbz 3, 0(30)
+; AIX32-NEXT: lwarx 4, 0, 24
+; AIX32-NEXT: srw 6, 4, 23
+; AIX32-NEXT: clrlwi 6, 6, 24
+; AIX32-NEXT: cmplw 6, 3
+; AIX32-NEXT: bne 0, L..BB3_34
+; AIX32-NEXT: # %bb.31: # %cmpxchg.fencedstore86
+; AIX32-NEXT: sync
+; AIX32-NEXT: slw 5, 5, 23
+; AIX32-NEXT: .align 4
+; AIX32-NEXT: L..BB3_32: # %cmpxchg.trystore85
+; AIX32-NEXT: #
+; AIX32-NEXT: and 4, 4, 22
+; AIX32-NEXT: or 4, 4, 5
+; AIX32-NEXT: stwcx. 4, 0, 24
+; AIX32-NEXT: beq 0, L..BB3_35
+; AIX32-NEXT: # %bb.33: # %cmpxchg.releasedload84
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 4, 0, 24
+; AIX32-NEXT: srw 6, 4, 23
+; AIX32-NEXT: clrlwi 6, 6, 24
+; AIX32-NEXT: cmplw 6, 3
+; AIX32-NEXT: beq 0, L..BB3_32
+; AIX32-NEXT: L..BB3_34: # %cmpxchg.nostore82
+; AIX32-NEXT: crxor 20, 20, 20
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: b L..BB3_36
+; AIX32-NEXT: L..BB3_35: # %cmpxchg.success83
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: creqv 20, 20, 20
+; AIX32-NEXT: L..BB3_36: # %cmpxchg.end80
+; AIX32-NEXT: li 3, 0
+; AIX32-NEXT: li 4, 1
+; AIX32-NEXT: lbz 5, 0(29)
+; AIX32-NEXT: isel 3, 4, 3, 20
+; AIX32-NEXT: stw 3, 0(28)
+; AIX32-NEXT: lbz 3, 0(30)
+; AIX32-NEXT: lwarx 4, 0, 21
+; AIX32-NEXT: srw 6, 4, 20
+; AIX32-NEXT: clrlwi 6, 6, 16
+; AIX32-NEXT: cmplw 6, 3
+; AIX32-NEXT: bne 0, L..BB3_40
+; AIX32-NEXT: # %bb.37: # %cmpxchg.fencedstore53
+; AIX32-NEXT: extsb 5, 5
+; AIX32-NEXT: sync
+; AIX32-NEXT: clrlwi 5, 5, 16
+; AIX32-NEXT: slw 5, 5, 20
+; AIX32-NEXT: .align 4
+; AIX32-NEXT: L..BB3_38: # %cmpxchg.trystore52
+; AIX32-NEXT: #
+; AIX32-NEXT: and 4, 4, 19
+; AIX32-NEXT: or 4, 4, 5
+; AIX32-NEXT: stwcx. 4, 0, 21
+; AIX32-NEXT: beq 0, L..BB3_41
+; AIX32-NEXT: # %bb.39: # %cmpxchg.releasedload51
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 4, 0, 21
+; AIX32-NEXT: srw 6, 4, 20
+; AIX32-NEXT: clrlwi 6, 6, 16
+; AIX32-NEXT: cmplw 6, 3
+; AIX32-NEXT: beq 0, L..BB3_38
+; AIX32-NEXT: L..BB3_40: # %cmpxchg.nostore49
+; AIX32-NEXT: crxor 20, 20, 20
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: b L..BB3_42
+; AIX32-NEXT: L..BB3_41: # %cmpxchg.success50
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: creqv 20, 20, 20
+; AIX32-NEXT: L..BB3_42: # %cmpxchg.end47
+; AIX32-NEXT: li 3, 0
+; AIX32-NEXT: li 4, 1
+; AIX32-NEXT: lbz 5, 0(29)
+; AIX32-NEXT: isel 3, 4, 3, 20
+; AIX32-NEXT: stw 3, 0(28)
+; AIX32-NEXT: lbz 3, 0(30)
+; AIX32-NEXT: lwarx 4, 0, 18
+; AIX32-NEXT: srw 6, 4, 17
+; AIX32-NEXT: clrlwi 6, 6, 16
+; AIX32-NEXT: cmplw 6, 3
+; AIX32-NEXT: bne 0, L..BB3_46
+; AIX32-NEXT: # %bb.43: # %cmpxchg.fencedstore29
+; AIX32-NEXT: extsb 5, 5
+; AIX32-NEXT: sync
+; AIX32-NEXT: clrlwi 5, 5, 16
+; AIX32-NEXT: slw 5, 5, 17
+; AIX32-NEXT: .align 4
+; AIX32-NEXT: L..BB3_44: # %cmpxchg.trystore28
+; AIX32-NEXT: #
+; AIX32-NEXT: and 4, 4, 16
+; AIX32-NEXT: or 4, 4, 5
+; AIX32-NEXT: stwcx. 4, 0, 18
+; AIX32-NEXT: beq 0, L..BB3_47
+; AIX32-NEXT: # %bb.45: # %cmpxchg.releasedload27
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 4, 0, 18
+; AIX32-NEXT: srw 6, 4, 17
+; AIX32-NEXT: clrlwi 6, 6, 16
+; AIX32-NEXT: cmplw 6, 3
+; AIX32-NEXT: beq 0, L..BB3_44
+; AIX32-NEXT: L..BB3_46: # %cmpxchg.nostore25
+; AIX32-NEXT: crxor 20, 20, 20
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: b L..BB3_48
+; AIX32-NEXT: L..BB3_47: # %cmpxchg.success26
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: creqv 20, 20, 20
+; AIX32-NEXT: L..BB3_48: # %cmpxchg.end23
+; AIX32-NEXT: li 3, 0
+; AIX32-NEXT: li 4, 1
+; AIX32-NEXT: isel 3, 4, 3, 20
+; AIX32-NEXT: lbz 4, 0(29)
+; AIX32-NEXT: stw 3, 0(28)
+; AIX32-NEXT: lbz 3, 0(30)
+; AIX32-NEXT: lwarx 5, 0, 15
+; AIX32-NEXT: cmplw 5, 3
+; AIX32-NEXT: bne 0, L..BB3_52
+; AIX32-NEXT: # %bb.49: # %cmpxchg.fencedstore10
+; AIX32-NEXT: extsb 4, 4
+; AIX32-NEXT: sync
+; AIX32-NEXT: .align 5
+; AIX32-NEXT: L..BB3_50: # %cmpxchg.trystore9
+; AIX32-NEXT: #
+; AIX32-NEXT: stwcx. 4, 0, 15
+; AIX32-NEXT: beq 0, L..BB3_53
+; AIX32-NEXT: # %bb.51: # %cmpxchg.releasedload8
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 5, 0, 15
+; AIX32-NEXT: cmplw 5, 3
+; AIX32-NEXT: beq 0, L..BB3_50
+; AIX32-NEXT: L..BB3_52: # %cmpxchg.nostore6
+; AIX32-NEXT: crxor 20, 20, 20
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: b L..BB3_54
+; AIX32-NEXT: L..BB3_53: # %cmpxchg.success7
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: creqv 20, 20, 20
+; AIX32-NEXT: L..BB3_54: # %cmpxchg.end4
+; AIX32-NEXT: li 3, 0
+; AIX32-NEXT: li 4, 1
+; AIX32-NEXT: isel 3, 4, 3, 20
+; AIX32-NEXT: lbz 4, 0(29)
+; AIX32-NEXT: stw 3, 0(28)
+; AIX32-NEXT: lbz 3, 0(30)
+; AIX32-NEXT: lwarx 5, 0, 28
+; AIX32-NEXT: cmplw 5, 3
+; AIX32-NEXT: bne 0, L..BB3_58
+; AIX32-NEXT: # %bb.55: # %cmpxchg.fencedstore
+; AIX32-NEXT: extsb 4, 4
+; AIX32-NEXT: sync
+; AIX32-NEXT: .align 5
+; AIX32-NEXT: L..BB3_56: # %cmpxchg.trystore
+; AIX32-NEXT: #
+; AIX32-NEXT: stwcx. 4, 0, 28
+; AIX32-NEXT: beq 0, L..BB3_59
+; AIX32-NEXT: # %bb.57: # %cmpxchg.releasedload
+; AIX32-NEXT: #
+; AIX32-NEXT: lwarx 5, 0, 28
+; AIX32-NEXT: cmplw 5, 3
+; AIX32-NEXT: beq 0, L..BB3_56
+; AIX32-NEXT: L..BB3_58: # %cmpxchg.nostore
+; AIX32-NEXT: crxor 20, 20, 20
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: b L..BB3_60
+; AIX32-NEXT: L..BB3_59: # %cmpxchg.success
+; AIX32-NEXT: lwsync
+; AIX32-NEXT: creqv 20, 20, 20
+; AIX32-NEXT: L..BB3_60: # %cmpxchg.end
+; AIX32-NEXT: li 3, 1
+; AIX32-NEXT: li 31, 0
+; AIX32-NEXT: lbz 4, 0(29)
+; AIX32-NEXT: isel 3, 3, 31, 20
+; AIX32-NEXT: li 7, 5
+; AIX32-NEXT: li 8, 5
+; AIX32-NEXT: extsb 6, 4
+; AIX32-NEXT: stw 3, 0(28)
+; AIX32-NEXT: lbz 3, 0(30)
+; AIX32-NEXT: addi 4, 1, 64
+; AIX32-NEXT: stw 31, 64(1)
+; AIX32-NEXT: srawi 5, 6, 31
+; AIX32-NEXT: stw 3, 68(1)
+; AIX32-NEXT: lwz 3, L..C6(2) # @sll
+; AIX32-NEXT: bl .__atomic_compare_exchange_8[PR]
+; AIX32-NEXT: nop
+; AIX32-NEXT: lbz 4, 0(29)
+; AIX32-NEXT: stw 3, 0(28)
+; AIX32-NEXT: lbz 3, 0(30)
+; AIX32-NEXT: li 7, 5
+; AIX32-NEXT: li 8, 5
+; AIX32-NEXT: extsb 6, 4
+; AIX32-NEXT: stw 3, 68(1)
+; AIX32-NEXT: lwz 3, L..C7(2) # @ull
+; AIX32-NEXT: addi 4, 1, 64
+; AIX32-NEXT: stw 31, 64(1)
+; AIX32-NEXT: srawi 5, 6, 31
+; AIX32-NEXT: bl .__atomic_compare_exchange_8[PR]
+; AIX32-NEXT: nop
+; AIX32-NEXT: stw 3, 0(28)
+; AIX32-NEXT: lwz 31, 140(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 30, 136(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 29, 132(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 28, 128(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 27, 124(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 26, 120(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 25, 116(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 24, 112(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 23, 108(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 22, 104(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 21, 100(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 20, 96(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 19, 92(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 18, 88(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 17, 84(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 16, 80(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 15, 76(1) # 4-byte Folded Reload
+; AIX32-NEXT: lwz 14, 72(1) # 4-byte Folded Reload
+; AIX32-NEXT: addi 1, 1, 144
+; AIX32-NEXT: lwz 0, 8(1)
+; AIX32-NEXT: mtlr 0
; AIX32-NEXT: blr
entry:
%0 = load i8, ptr @uc, align 1
@@ -5852,20 +5836,23 @@ entry:
define dso_local i64 @cmpswplp(ptr noundef %ptr, ptr nocapture noundef readnone %oldval, i64 noundef %newval) local_unnamed_addr #0 {
; CHECK-LABEL: cmpswplp:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: ldarx 4, 0, 3
-; CHECK-NEXT: cmpld 4, 5
-; CHECK-NEXT: bne 0, .LBB6_2
-; CHECK-NEXT: # %bb.1: # %cmpxchg.fencedstore
-; CHECK-NEXT: addi 4, 5, 1
-; CHECK-NEXT: stdcx. 4, 0, 3
-; CHECK-NEXT: beq 0, .LBB6_4
-; CHECK-NEXT: .LBB6_2: # %cmpxchg.failure
-; CHECK-NEXT: crxor 20, 20, 20
-; CHECK-NEXT: .LBB6_3: # %cmpxchg.end
-; CHECK-NEXT: li 3, 66
-; CHECK-NEXT: li 4, 55
-; CHECK-NEXT: isel 3, 4, 3, 20
-; CHECK-NEXT: blr
+; CHECK-NEXT: ldarx 4, 0, 3
+; CHECK-NEXT: cmpld 4, 5
+; CHECK-NEXT: bne 0, .LBB6_2
+; CHECK-NEXT: # %bb.1: # %cmpxchg.fencedstore
+; CHECK-NEXT: addi 4, 5, 1
+; CHECK-NEXT: stdcx. 4, 0, 3
+; CHECK-NEXT: beq 0, .LBB6_4
+; CHECK-NEXT: .LBB6_2: # %cmpxchg.failure
+; CHECK-NEXT: crxor 20, 20, 20
+; CHECK-NEXT: .LBB6_3: # %cmpxchg.end
+; CHECK-NEXT: li 3, 66
+; CHECK-NEXT: li 4, 55
+; CHECK-NEXT: isel 3, 4, 3, 20
+; CHECK-NEXT: blr
+; CHECK-NEXT: .LBB6_4:
+; CHECK-NEXT: creqv 20, 20, 20
+; CHECK-NEXT: b .LBB6_3
;
; AIX32-LABEL: cmpswplp:
; AIX32: # %bb.0: # %entry
diff --git a/llvm/test/CodeGen/PowerPC/atomics-regression.ll b/llvm/test/CodeGen/PowerPC/atomics-regression.ll
index 280c4299c30b7..0474a479a1fef 100644
--- a/llvm/test/CodeGen/PowerPC/atomics-regression.ll
+++ b/llvm/test/CodeGen/PowerPC/atomics-regression.ll
@@ -406,7 +406,6 @@ define void @test40(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: .LBB40_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -428,7 +427,6 @@ define void @test41(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: .LBB41_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -451,7 +449,6 @@ define void @test42(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: .LBB42_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB42_3
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -470,7 +467,6 @@ define void @test43(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -484,7 +480,6 @@ define void @test43(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB43_2
; PPC64LE-NEXT: blr
@@ -497,7 +492,6 @@ define void @test44(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB44_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -511,7 +505,6 @@ define void @test44(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB44_2
; PPC64LE-NEXT: .LBB44_4: # %cmpxchg.nostore
@@ -526,7 +519,6 @@ define void @test45(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -540,7 +532,6 @@ define void @test45(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB45_2
; PPC64LE-NEXT: # %bb.4: # %cmpxchg.end
@@ -557,7 +548,6 @@ define void @test46(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB46_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -571,7 +561,6 @@ define void @test46(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB46_2
; PPC64LE-NEXT: .LBB46_4: # %cmpxchg.nostore
@@ -586,7 +575,6 @@ define void @test47(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -600,7 +588,6 @@ define void @test47(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB47_2
; PPC64LE-NEXT: # %bb.4: # %cmpxchg.end
@@ -617,7 +604,6 @@ define void @test48(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB48_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -631,7 +617,6 @@ define void @test48(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB48_2
; PPC64LE-NEXT: .LBB48_4: # %cmpxchg.nostore
@@ -646,7 +631,6 @@ define void @test49(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB49_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -660,7 +644,6 @@ define void @test49(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB49_2
; PPC64LE-NEXT: .LBB49_4: # %cmpxchg.nostore
@@ -679,7 +662,6 @@ define void @test50(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: .LBB50_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -701,7 +683,6 @@ define void @test51(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: .LBB51_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -724,7 +705,6 @@ define void @test52(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: .LBB52_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB52_3
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -743,7 +723,6 @@ define void @test53(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -757,7 +736,6 @@ define void @test53(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB53_2
; PPC64LE-NEXT: blr
@@ -770,7 +748,6 @@ define void @test54(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB54_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -784,7 +761,6 @@ define void @test54(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB54_2
; PPC64LE-NEXT: .LBB54_4: # %cmpxchg.nostore
@@ -799,7 +775,6 @@ define void @test55(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -813,7 +788,6 @@ define void @test55(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB55_2
; PPC64LE-NEXT: # %bb.4: # %cmpxchg.end
@@ -830,7 +804,6 @@ define void @test56(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB56_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -844,7 +817,6 @@ define void @test56(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB56_2
; PPC64LE-NEXT: .LBB56_4: # %cmpxchg.nostore
@@ -859,7 +831,6 @@ define void @test57(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -873,7 +844,6 @@ define void @test57(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB57_2
; PPC64LE-NEXT: # %bb.4: # %cmpxchg.end
@@ -890,7 +860,6 @@ define void @test58(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB58_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -904,7 +873,6 @@ define void @test58(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB58_2
; PPC64LE-NEXT: .LBB58_4: # %cmpxchg.nostore
@@ -919,7 +887,6 @@ define void @test59(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB59_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -933,7 +900,6 @@ define void @test59(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB59_2
; PPC64LE-NEXT: .LBB59_4: # %cmpxchg.nostore
@@ -1424,7 +1390,6 @@ define void @test80(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: .LBB80_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -1446,7 +1411,6 @@ define void @test81(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: .LBB81_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -1469,7 +1433,6 @@ define void @test82(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: .LBB82_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB82_3
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -1488,7 +1451,6 @@ define void @test83(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1502,7 +1464,6 @@ define void @test83(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB83_2
; PPC64LE-NEXT: blr
@@ -1515,7 +1476,6 @@ define void @test84(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB84_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1529,7 +1489,6 @@ define void @test84(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB84_2
; PPC64LE-NEXT: .LBB84_4: # %cmpxchg.nostore
@@ -1544,7 +1503,6 @@ define void @test85(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1558,7 +1516,6 @@ define void @test85(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB85_2
; PPC64LE-NEXT: # %bb.4: # %cmpxchg.end
@@ -1575,7 +1532,6 @@ define void @test86(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB86_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1589,7 +1545,6 @@ define void @test86(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB86_2
; PPC64LE-NEXT: .LBB86_4: # %cmpxchg.nostore
@@ -1604,7 +1559,6 @@ define void @test87(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1618,7 +1572,6 @@ define void @test87(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB87_2
; PPC64LE-NEXT: # %bb.4: # %cmpxchg.end
@@ -1635,7 +1588,6 @@ define void @test88(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB88_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1649,7 +1601,6 @@ define void @test88(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB88_2
; PPC64LE-NEXT: .LBB88_4: # %cmpxchg.nostore
@@ -1664,7 +1615,6 @@ define void @test89(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB89_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1678,7 +1628,6 @@ define void @test89(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB89_2
; PPC64LE-NEXT: .LBB89_4: # %cmpxchg.nostore
@@ -1697,7 +1646,6 @@ define void @test90(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: .LBB90_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -1719,7 +1667,6 @@ define void @test91(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: .LBB91_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -1742,7 +1689,6 @@ define void @test92(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: .LBB92_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB92_3
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
@@ -1761,7 +1707,6 @@ define void @test93(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1775,7 +1720,6 @@ define void @test93(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB93_2
; PPC64LE-NEXT: blr
@@ -1788,7 +1732,6 @@ define void @test94(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB94_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1802,7 +1745,6 @@ define void @test94(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB94_2
; PPC64LE-NEXT: .LBB94_4: # %cmpxchg.nostore
@@ -1817,7 +1759,6 @@ define void @test95(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1831,7 +1772,6 @@ define void @test95(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB95_2
; PPC64LE-NEXT: # %bb.4: # %cmpxchg.end
@@ -1848,7 +1788,6 @@ define void @test96(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB96_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1862,7 +1801,6 @@ define void @test96(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB96_2
; PPC64LE-NEXT: .LBB96_4: # %cmpxchg.nostore
@@ -1877,7 +1815,6 @@ define void @test97(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1891,7 +1828,6 @@ define void @test97(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB97_2
; PPC64LE-NEXT: # %bb.4: # %cmpxchg.end
@@ -1908,7 +1844,6 @@ define void @test98(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB98_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1922,7 +1857,6 @@ define void @test98(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB98_2
; PPC64LE-NEXT: .LBB98_4: # %cmpxchg.nostore
@@ -1937,7 +1871,6 @@ define void @test99(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE: # %bb.0: # %cmpxchg.start
; PPC64LE-NEXT: lharx 6, 0, 3
; PPC64LE-NEXT: clrlwi 4, 4, 16
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bne 0, .LBB99_4
; PPC64LE-NEXT: # %bb.1: # %cmpxchg.fencedstore
@@ -1951,7 +1884,6 @@ define void @test99(ptr %ptr, i16 %cmp, i16 %val) {
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.releasedload
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lharx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 16
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: beq 0, .LBB99_2
; PPC64LE-NEXT: .LBB99_4: # %cmpxchg.nostore
diff --git a/llvm/test/CodeGen/PowerPC/loop-comment.ll b/llvm/test/CodeGen/PowerPC/loop-comment.ll
index 1fa9dda51ef9e..530e67b4804fb 100644
--- a/llvm/test/CodeGen/PowerPC/loop-comment.ll
+++ b/llvm/test/CodeGen/PowerPC/loop-comment.ll
@@ -6,18 +6,17 @@ define void @test(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE: # %bb.0:
; PPC64LE-NEXT: clrlwi 5, 5, 24
; PPC64LE-NEXT: clrlwi 4, 4, 24
-; PPC64LE-NEXT: .p2align 5
-; PPC64LE-NEXT: .LBB0_1: # %cmpxchg.start
-; PPC64LE-NEXT: # =>This Inner Loop Header: Depth=1
+; PPC64LE-NEXT: .p2align 5
+; PPC64LE-NEXT: .LBB0_1: # %cmpxchg.start
+; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
-; PPC64LE-NEXT: clrlwi 6, 6, 24
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr 0
-; PPC64LE-NEXT: # %bb.2:
-; PPC64LE-NEXT: # in Loop: Header=BB0_1 Depth=1
+; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
+; PPC64LE-NEXT: #
; PPC64LE-NEXT: stbcx. 5, 0, 3
; PPC64LE-NEXT: bne 0, .LBB0_1
-; PPC64LE-NEXT: # %bb.3:
+; PPC64LE-NEXT: # %bb.3: # %cmpxchg.end
; PPC64LE-NEXT: blr
%res = cmpxchg ptr %ptr, i8 %cmp, i8 %val monotonic monotonic
ret void
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