[llvm] [PowePC] using MTVSRBMI instruction instead of constant pool in power10+ (PR #144084)
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Fri Jun 13 07:36:04 PDT 2025
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You can test this locally with the following command:
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``````````bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp -- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 60c89aff1..f2eb6163d 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -9622,20 +9622,21 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(Op.getNode());
assert(BVN && "Expected a BuildVectorSDNode in LowerBUILD_VECTOR");
- if(Subtarget.hasP10Vector()) {
+ if (Subtarget.hasP10Vector()) {
APInt BMI(32, 0);
// If the value of the vector is all zeros or all ones,
// we do not convert it to MTVSRBMI.
// The xxleqv instruction sets a vector with all ones.
// The xxlxor instruction sets a vector with all zeros.
- if (isValidMtVsrbmi(BMI, *BVN) && BMI != 0 && BMI!=0xffff ) {
- SDValue SDConstant= DAG.getTargetConstant(BMI, dl, MVT::i32);
- MachineSDNode* MSDNode = DAG.getMachineNode(PPC::MTVSRBMI, dl,MVT::v16i8, SDConstant);
- SDValue SDV = SDValue(MSDNode,0);
+ if (isValidMtVsrbmi(BMI, *BVN) && BMI != 0 && BMI != 0xffff) {
+ SDValue SDConstant = DAG.getTargetConstant(BMI, dl, MVT::i32);
+ MachineSDNode *MSDNode =
+ DAG.getMachineNode(PPC::MTVSRBMI, dl, MVT::v16i8, SDConstant);
+ SDValue SDV = SDValue(MSDNode, 0);
EVT DVT = BVN->getValueType(0);
EVT SVT = SDV.getValueType();
- if (SVT != DVT ) {
- SDV = DAG.getNode(ISD::BITCAST, dl, DVT, SDV);
+ if (SVT != DVT) {
+ SDV = DAG.getNode(ISD::BITCAST, dl, DVT, SDV);
}
return SDV;
}
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https://github.com/llvm/llvm-project/pull/144084
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