[llvm] [AArch64][Codegen]Transform saturating smull to sqdmulh (PR #143671)

[Nashe Mncube via llvm-commits]

================
@@ -9349,6 +9349,13 @@ def : Pat<(v4i32 (mulhs V128:$Rn, V128:$Rm)),
                              (EXTRACT_SUBREG V128:$Rm, dsub)),
            (SMULLv4i32_v2i64 V128:$Rn, V128:$Rm))>;
 
+// Saturating vector mulitplications on signed integers
+// follow a smull + smull2 + uzip + smin pattern. It would 
+// be more efficient to make use of sqdmulh instructions
+def : Pat<(v4i32 (smin (mulhs V128:$Rn, V128:$Rm), 
+                        (v4i32 (AArch64mvni_shift (i32 192), (i32 24))))),
+           (USHRv4i32_shift (SQDMULHv4i32 V128:$Rn, V128:$Rm), (i32 1))>;
----------------
nasherm wrote:

I've updated my patch to make use of AArch64ISelLowering to make it more generic

https://github.com/llvm/llvm-project/pull/143671